Contiki-NG
cc2538-rf.c
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1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538-rf
33  * @{
34  *
35  * \file
36  * Implementation of the cc2538 RF driver
37  */
38 #include "contiki.h"
39 #include "dev/radio.h"
40 #include "sys/clock.h"
41 #include "sys/rtimer.h"
42 #include "net/packetbuf.h"
43 #include "net/linkaddr.h"
44 #include "net/netstack.h"
45 #include "net/mac/tsch/tsch.h"
46 #include "sys/energest.h"
47 #include "dev/cc2538-rf.h"
48 #include "dev/rfcore.h"
49 #include "dev/sys-ctrl.h"
50 #include "dev/udma.h"
51 #include "reg.h"
52 
53 #include <string.h>
54 /*---------------------------------------------------------------------------*/
55 #define CHECKSUM_LEN 2
56 
57 /* uDMA channel control persistent flags */
58 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
59  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
60  | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
61 
62 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
63  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
64  | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
65 
66 /*
67  * uDMA transfer threshold. DMA will only be used to read an incoming frame
68  * if its size is above this threshold
69  */
70 #define UDMA_RX_SIZE_THRESHOLD 3
71 /*---------------------------------------------------------------------------*/
72 /* Log configuration */
73 #include "sys/log.h"
74 #define LOG_MODULE "cc2538-rf"
75 #define LOG_LEVEL LOG_LEVEL_NONE
76 /*---------------------------------------------------------------------------*/
77 /* Local RF Flags */
78 #define RX_ACTIVE 0x80
79 #define RF_MUST_RESET 0x40
80 #define RF_ON 0x01
81 
82 /* Bit Masks for the last byte in the RX FIFO */
83 #define CRC_BIT_MASK 0x80
84 #define LQI_BIT_MASK 0x7F
85 /* RSSI Offset */
86 #define RSSI_OFFSET 73
87 #define RSSI_INVALID -128
88 
89 /* 192 usec off -> on interval (RX Callib -> SFD Wait). We wait a bit more */
90 #define ONOFF_TIME RTIMER_ARCH_SECOND / 3125
91 /*---------------------------------------------------------------------------*/
92 #ifdef CC2538_RF_CONF_AUTOACK
93 #define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK
94 #else
95 #define CC2538_RF_AUTOACK 1
96 #endif
97 /*---------------------------------------------------------------------------
98  * MAC timer
99  *---------------------------------------------------------------------------*/
100 /* Timer conversion */
101 #define RADIO_TO_RTIMER(X) ((uint32_t)((uint64_t)(X) * RTIMER_ARCH_SECOND / SYS_CTRL_32MHZ))
102 
103 #define CLOCK_STABLE() do { \
104  while ( !(REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB))); \
105  } while(0)
106 /*---------------------------------------------------------------------------*/
107 /* Are we currently in poll mode? Disabled by default */
108 static uint8_t volatile poll_mode = 0;
109 /* Do we perform a CCA before sending? Enabled by default. */
110 static uint8_t send_on_cca = 1;
111 static int8_t rssi;
112 static uint8_t crc_corr;
113 /*---------------------------------------------------------------------------*/
114 static uint8_t rf_flags;
115 static uint8_t rf_channel = IEEE802154_DEFAULT_CHANNEL;
116 
117 static int on(void);
118 static int off(void);
119 /*---------------------------------------------------------------------------*/
120 /* TX Power dBm lookup table. Values from SmartRF Studio v1.16.0 */
121 typedef struct output_config {
122  radio_value_t power;
123  uint8_t txpower_val;
124 } output_config_t;
125 
126 static const output_config_t output_power[] = {
127  { 7, 0xFF },
128  { 5, 0xED },
129  { 3, 0xD5 },
130  { 1, 0xC5 },
131  { 0, 0xB6 },
132  { -1, 0xB0 },
133  { -3, 0xA1 },
134  { -5, 0x91 },
135  { -7, 0x88 },
136  { -9, 0x72 },
137  {-11, 0x62 },
138  {-13, 0x58 },
139  {-15, 0x42 },
140  {-24, 0x00 },
141 };
142 
143 static radio_result_t get_value(radio_param_t param, radio_value_t *value);
144 
145 #define OUTPUT_CONFIG_COUNT (sizeof(output_power) / sizeof(output_config_t))
146 
147 /* Max and Min Output Power in dBm */
148 #define OUTPUT_POWER_MIN (output_power[OUTPUT_CONFIG_COUNT - 1].power)
149 #define OUTPUT_POWER_MAX (output_power[0].power)
150 /*---------------------------------------------------------------------------*/
151 /*
152  * The maximum number of bytes this driver can accept from the MAC layer for
153  * transmission or will deliver to the MAC layer after reception. Includes
154  * the MAC header and payload, but not the FCS.
155  */
156 #define MAX_PAYLOAD_LEN (CC2538_RF_MAX_PACKET_LEN - CHECKSUM_LEN)
157 /*---------------------------------------------------------------------------*/
158 PROCESS(cc2538_rf_process, "cc2538 RF driver");
159 /*---------------------------------------------------------------------------*/
160 /**
161  * \brief Get the current operating channel
162  * \return Returns a value in [11,26] representing the current channel
163  */
164 static uint8_t
166 {
167  return rf_channel;
168 }
169 /*---------------------------------------------------------------------------*/
170 /**
171  * \brief Set the current operating channel
172  * \param channel The desired channel as a value in [11,26]
173  */
174 static void
175 set_channel(uint8_t channel)
176 {
177  uint8_t was_on = 0;
178 
179  LOG_INFO("Set Channel\n");
180 
181  /* Changes to FREQCTRL take effect after the next recalibration */
182 
183  /* If we are off, save state, otherwise switch off and save state */
185  was_on = 1;
186  off();
187  }
188  REG(RFCORE_XREG_FREQCTRL) = CC2538_RF_CHANNEL_MIN +
189  (channel - CC2538_RF_CHANNEL_MIN) * CC2538_RF_CHANNEL_SPACING;
190 
191  /* switch radio back on only if radio was on before - otherwise will turn on radio foor sleepy nodes */
192  if(was_on) {
193  on();
194  }
195 
196  rf_channel = channel;
197 }
198 /*---------------------------------------------------------------------------*/
199 static radio_value_t
200 get_pan_id(void)
201 {
202  return (radio_value_t)(REG(RFCORE_FFSM_PAN_ID1) << 8 | REG(RFCORE_FFSM_PAN_ID0));
203 }
204 /*---------------------------------------------------------------------------*/
205 static void
206 set_pan_id(uint16_t pan)
207 {
208  REG(RFCORE_FFSM_PAN_ID0) = pan & 0xFF;
209  REG(RFCORE_FFSM_PAN_ID1) = pan >> 8;
210 }
211 /*---------------------------------------------------------------------------*/
212 static radio_value_t
213 get_short_addr(void)
214 {
216 }
217 /*---------------------------------------------------------------------------*/
218 static void
219 set_short_addr(uint16_t addr)
220 {
221  REG(RFCORE_FFSM_SHORT_ADDR0) = addr & 0xFF;
222  REG(RFCORE_FFSM_SHORT_ADDR1) = addr >> 8;
223 }
224 /*---------------------------------------------------------------------------*/
225 /**
226  * \brief Reads the current signal strength (RSSI)
227  * \return The current RSSI in dBm
228  *
229  * This function reads the current RSSI on the currently configured
230  * channel.
231  */
232 static radio_value_t
233 get_rssi(void)
234 {
235  int8_t rssi;
236  uint8_t was_off = 0;
237 
238  /* If we are off, turn on first */
240  was_off = 1;
241  on();
242  }
243 
244  /* Wait for a valid RSSI reading */
245  do {
246  rssi = REG(RFCORE_XREG_RSSI);
247  } while(rssi == RSSI_INVALID);
248  rssi -= RSSI_OFFSET;
249 
250  /* If we were off, turn back off */
251  if(was_off) {
252  off();
253  }
254 
255  return rssi;
256 }
257 /*---------------------------------------------------------------------------*/
258 /* Returns the current CCA threshold in dBm */
259 static radio_value_t
260 get_cca_threshold(void)
261 {
262  return (int8_t)(REG(RFCORE_XREG_CCACTRL0) & RFCORE_XREG_CCACTRL0_CCA_THR) - RSSI_OFFSET;
263 }
264 /*---------------------------------------------------------------------------*/
265 /* Sets the CCA threshold in dBm */
266 static void
267 set_cca_threshold(radio_value_t value)
268 {
269  REG(RFCORE_XREG_CCACTRL0) = (value & 0xFF) + RSSI_OFFSET;
270 }
271 /*---------------------------------------------------------------------------*/
272 /* Returns the current TX power in dBm */
273 static radio_value_t
274 get_tx_power(void)
275 {
276  int i;
277  uint8_t reg_val = REG(RFCORE_XREG_TXPOWER) & 0xFF;
278 
279  /*
280  * Find the TXPOWER value in the lookup table
281  * If the value has been written with set_tx_power, we should be able to
282  * find the exact value. However, in case the register has been written in
283  * a different fashion, we return the immediately lower value of the lookup
284  */
285  for(i = 0; i < OUTPUT_CONFIG_COUNT; i++) {
286  if(reg_val >= output_power[i].txpower_val) {
287  return output_power[i].power;
288  }
289  }
290  return OUTPUT_POWER_MIN;
291 }
292 /*---------------------------------------------------------------------------*/
293 /*
294  * Set TX power to 'at least' power dBm
295  * This works with a lookup table. If the value of 'power' does not exist in
296  * the lookup table, TXPOWER will be set to the immediately higher available
297  * value
298  */
299 static void
300 set_tx_power(radio_value_t power)
301 {
302  int i;
303 
304  for(i = OUTPUT_CONFIG_COUNT - 1; i >= 0; --i) {
305  if(power <= output_power[i].power) {
306  REG(RFCORE_XREG_TXPOWER) = output_power[i].txpower_val;
307  return;
308  }
309  }
310 }
311 /*---------------------------------------------------------------------------*/
312 static void
313 set_frame_filtering(uint8_t enable)
314 {
315  if(enable) {
317  } else {
319  }
320 }
321 /*---------------------------------------------------------------------------*/
322 static void
323 set_shr_search(int enable)
324 {
325  if(enable) {
327  } else {
329  }
330 }
331 /*---------------------------------------------------------------------------*/
332 static void
333 mac_timer_init(void)
334 {
335  CLOCK_STABLE();
340  while(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE);
343  while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
344 }
345 /*---------------------------------------------------------------------------*/
346 static void
347 set_poll_mode(uint8_t enable)
348 {
349  poll_mode = enable;
350 
351  if(enable) {
352  mac_timer_init();
353  REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; /* mask out FIFOP interrupt source */
354  REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; /* clear pending FIFOP interrupt */
355  NVIC_DisableIRQ(RF_TX_RX_IRQn); /* disable RF interrupts */
356  } else {
357  REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; /* enable FIFOP interrupt source */
358  NVIC_EnableIRQ(RF_TX_RX_IRQn); /* enable RF interrupts */
359  }
360 }
361 /*---------------------------------------------------------------------------*/
362 static void
363 set_send_on_cca(uint8_t enable)
364 {
365  send_on_cca = enable;
366 }
367 /*---------------------------------------------------------------------------*/
368 static void
369 set_auto_ack(uint8_t enable)
370 {
371  if(enable) {
373  } else {
375  }
376 }
377 /*---------------------------------------------------------------------------*/
378 static uint32_t
379 get_sfd_timestamp(void)
380 {
381  uint64_t sfd, timer_val, buffer;
382 
383  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000000;
385  timer_val = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
386  timer_val |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
388  timer_val |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
389  timer_val |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
391  timer_val |= (buffer << 32);
392 
393  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
396  sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
398  sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
399  sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
401  sfd |= (buffer << 32);
402 
403  return RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd);
404 }
405 /*---------------------------------------------------------------------------*/
406 /* Enable or disable radio test mode emmiting modulated or unmodulated
407  * (carrier) signal. See User's Guide pages 719 and 741.
408  */
409 static uint32_t prev_FRMCTRL0, prev_MDMTEST1;
410 static uint8_t was_on;
411 
412 static void
413 set_test_mode(uint8_t enable, uint8_t modulated)
414 {
415  radio_value_t mode;
416  get_value(RADIO_PARAM_POWER_MODE, &mode);
417 
418  if(enable) {
419  if(mode == RADIO_POWER_MODE_CARRIER_ON) {
420  return;
421  }
422  was_on = (mode == RADIO_POWER_MODE_ON);
423  off();
424  prev_FRMCTRL0 = REG(RFCORE_XREG_FRMCTRL0);
425  /* This constantly transmits random data */
426  REG(RFCORE_XREG_FRMCTRL0) = 0x00000042;
427  if(!modulated) {
428  prev_MDMTEST1 = REG(RFCORE_XREG_MDMTEST1);
429  /* ...adding this we send an unmodulated carrier instead */
430  REG(RFCORE_XREG_MDMTEST1) = 0x00000018;
431  }
433  } else {
434  if(mode != RADIO_POWER_MODE_CARRIER_ON) {
435  return;
436  }
438  REG(RFCORE_XREG_FRMCTRL0) = prev_FRMCTRL0;
439  if(!modulated) {
440  REG(RFCORE_XREG_MDMTEST1) = prev_MDMTEST1;
441  }
442  if(was_on) {
443  on();
444  }
445  }
446 }
447 /*---------------------------------------------------------------------------*/
448 /* Netstack API radio driver functions */
449 /*---------------------------------------------------------------------------*/
450 static int
451 channel_clear(void)
452 {
453  int cca;
454  uint8_t was_off = 0;
455 
456  LOG_INFO("CCA\n");
457 
458  /* If we are off, turn on first */
460  was_off = 1;
461  on();
462  }
463 
464  /* Wait on RSSI_VALID */
466 
468  cca = CC2538_RF_CCA_CLEAR;
469  } else {
470  cca = CC2538_RF_CCA_BUSY;
471  }
472 
473  /* If we were off, turn back off */
474  if(was_off) {
475  off();
476  }
477 
478  return cca;
479 }
480 /*---------------------------------------------------------------------------*/
481 static int
482 on(void)
483 {
484  LOG_INFO("On\n");
485 
486  if(!(rf_flags & RX_ACTIVE)) {
489 
490  rf_flags |= RX_ACTIVE;
491  }
492 
493  ENERGEST_ON(ENERGEST_TYPE_LISTEN);
494  return 1;
495 }
496 /*---------------------------------------------------------------------------*/
497 static int
498 off(void)
499 {
500  LOG_INFO("Off\n");
501 
502  /* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
504 
507  }
508 
509  /* Don't turn off if we are off as this will trigger a Strobe Error */
510  if(REG(RFCORE_XREG_RXENABLE) != 0) {
512  }
513 
514  rf_flags &= ~RX_ACTIVE;
515 
516  ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
517  return 1;
518 }
519 /*---------------------------------------------------------------------------*/
520 static int
521 init(void)
522 {
523  LOG_INFO("Init\n");
524 
525  if(rf_flags & RF_ON) {
526  return 0;
527  }
528 
529  /* Enable clock for the RF Core while Running, in Sleep and Deep Sleep */
530  REG(SYS_CTRL_RCGCRFC) = 1;
531  REG(SYS_CTRL_SCGCRFC) = 1;
532  REG(SYS_CTRL_DCGCRFC) = 1;
533 
534  REG(RFCORE_XREG_CCACTRL0) = CC2538_RF_CCA_THRES;
535 
536  /*
537  * Changes from default values
538  * See User Guide, section "Register Settings Update"
539  */
540  REG(RFCORE_XREG_TXFILTCFG) = 0x09; /** TX anti-aliasing filter bandwidth */
541  REG(RFCORE_XREG_AGCCTRL1) = 0x15; /** AGC target value */
542  REG(ANA_REGS_IVCTRL) = 0x0B; /** Bias currents */
543  REG(RFCORE_XREG_FSCAL1) = 0x01; /** Tune frequency calibration */
544 
545  /*
546  * Defaults:
547  * Auto CRC; Append RSSI, CRC-OK and Corr. Val.; CRC calculation;
548  * RX and TX modes with FIFOs
549  */
551 
552 #if CC2538_RF_AUTOACK
554 #endif
555 
556  /* Disable source address matching and autopend */
557  REG(RFCORE_XREG_SRCMATCH) = 0;
558 
559  /* MAX FIFOP threshold */
560  REG(RFCORE_XREG_FIFOPCTRL) = CC2538_RF_MAX_PACKET_LEN;
561 
562  /* Set TX Power */
563  REG(RFCORE_XREG_TXPOWER) = CC2538_RF_TX_POWER;
564 
565  set_channel(rf_channel);
566 
567  /* Enable SHR search */
568  set_shr_search(1);
569 
570  /* Acknowledge all RF Error interrupts */
573 
575  /* Disable peripheral triggers for the channel */
577 
578  /*
579  * Set the channel's DST. SRC can not be set yet since it will change for
580  * each transfer
581  */
583  }
584 
586  /* Disable peripheral triggers for the channel */
588 
589  /*
590  * Set the channel's SRC. DST can not be set yet since it will change for
591  * each transfer
592  */
594  }
595 
596  set_poll_mode(poll_mode);
597 
598  process_start(&cc2538_rf_process, NULL);
599 
600  rf_flags |= RF_ON;
601 
602  return 1;
603 }
604 /*---------------------------------------------------------------------------*/
605 static int
606 prepare(const void *payload, unsigned short payload_len)
607 {
608  uint8_t i;
609 
610  if(payload_len > MAX_PAYLOAD_LEN) {
611  return RADIO_TX_ERR;
612  }
613 
614  LOG_INFO("Prepare 0x%02x bytes\n", payload_len + CHECKSUM_LEN);
615 
616  /*
617  * When we transmit in very quick bursts, make sure previous transmission
618  * is not still in progress before re-writing to the TX FIFO
619  */
621 
622  if((rf_flags & RX_ACTIVE) == 0) {
623  on();
624  }
625 
627 
628  LOG_INFO("data = ");
629  /* Send the phy length byte first */
630  REG(RFCORE_SFR_RFDATA) = payload_len + CHECKSUM_LEN;
631 
633  LOG_INFO_("<uDMA payload>");
634 
635  /* Set the transfer source's end address */
637  (uint32_t)(payload) + payload_len - 1);
638 
639  /* Configure the control word */
641  UDMA_TX_FLAGS | udma_xfer_size(payload_len));
642 
643  /* Enabled the RF TX uDMA channel */
645 
646  /* Trigger the uDMA transfer */
648 
649  /*
650  * No need to wait for this to end. Even if transmit() gets called
651  * immediately, the uDMA controller will stream the frame to the TX FIFO
652  * faster than transmit() can empty it
653  */
654  } else {
655  for(i = 0; i < payload_len; i++) {
656  REG(RFCORE_SFR_RFDATA) = ((unsigned char *)(payload))[i];
657  LOG_INFO_("%02x", ((unsigned char *)(payload))[i]);
658  }
659  }
660  LOG_INFO_("\n");
661 
662  return 0;
663 }
664 /*---------------------------------------------------------------------------*/
665 static int
666 transmit(unsigned short transmit_len)
667 {
668  uint8_t counter;
669  int ret = RADIO_TX_ERR;
670  rtimer_clock_t t0;
671  uint8_t was_off = 0;
672 
673  LOG_INFO("Transmit\n");
674 
675  if(transmit_len > MAX_PAYLOAD_LEN) {
676  return RADIO_TX_ERR;
677  }
678 
679  if(!(rf_flags & RX_ACTIVE)) {
680  t0 = RTIMER_NOW();
681  on();
682  was_off = 1;
683  while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
684  }
685 
686  if(send_on_cca) {
687  if(channel_clear() == CC2538_RF_CCA_BUSY) {
688  return RADIO_TX_COLLISION;
689  }
690  }
691 
692  /*
693  * prepare() double checked that TX_ACTIVE is low. If SFD is high we are
694  * receiving. Abort transmission and bail out with RADIO_TX_COLLISION
695  */
697  return RADIO_TX_COLLISION;
698  }
699 
700  /* Start the transmission */
701  ENERGEST_SWITCH(ENERGEST_TYPE_LISTEN, ENERGEST_TYPE_TRANSMIT);
702 
704 
705  counter = 0;
707  && (counter++ < 3)) {
708  clock_delay_usec(6);
709  }
710 
711  if(!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE)) {
712  LOG_ERR("TX never active.\n");
714  ret = RADIO_TX_ERR;
715  } else {
716  /* Wait for the transmission to finish */
717  while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
718  ret = RADIO_TX_OK;
719  }
720  ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
721 
722  if(was_off) {
723  off();
724  }
725 
726  return ret;
727 }
728 /*---------------------------------------------------------------------------*/
729 static int
730 send(const void *payload, unsigned short payload_len)
731 {
732  prepare(payload, payload_len);
733  return transmit(payload_len);
734 }
735 /*---------------------------------------------------------------------------*/
736 static int
737 read(void *buf, unsigned short bufsize)
738 {
739  uint8_t i;
740  uint8_t len;
741 
742  LOG_INFO("Read\n");
743 
745  return 0;
746  }
747 
748  /* Check the length */
749  len = REG(RFCORE_SFR_RFDATA);
750 
751  /* Check for validity */
752  if(len > CC2538_RF_MAX_PACKET_LEN) {
753  /* Oops, we must be out of sync. */
754  LOG_ERR("RF: bad sync\n");
755 
757  return 0;
758  }
759 
760  if(len <= CC2538_RF_MIN_PACKET_LEN) {
761  LOG_ERR("RF: too short\n");
762 
764  return 0;
765  }
766 
767  if(len - CHECKSUM_LEN > bufsize) {
768  LOG_ERR("RF: too long\n");
769 
771  return 0;
772  }
773 
774  /* If we reach here, chances are the FIFO is holding a valid frame */
775  LOG_INFO("read (0x%02x bytes) = ", len);
776  len -= CHECKSUM_LEN;
777 
778  /* Don't bother with uDMA for short frames (e.g. ACKs) */
779  if(CC2538_RF_CONF_RX_USE_DMA && len > UDMA_RX_SIZE_THRESHOLD) {
780  LOG_INFO_("<uDMA payload>");
781 
782  /* Set the transfer destination's end address */
784  (uint32_t)(buf) + len - 1);
785 
786  /* Configure the control word */
788  UDMA_RX_FLAGS | udma_xfer_size(len));
789 
790  /* Enabled the RF RX uDMA channel */
792 
793  /* Trigger the uDMA transfer */
795 
796  /* Wait for the transfer to complete. */
798  } else {
799  for(i = 0; i < len; ++i) {
800  ((unsigned char *)(buf))[i] = REG(RFCORE_SFR_RFDATA);
801  LOG_INFO_("%02x", ((unsigned char *)(buf))[i]);
802  }
803  }
804 
805  /* Read the RSSI and CRC/Corr bytes */
806  rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
807  crc_corr = REG(RFCORE_SFR_RFDATA);
808 
809  LOG_INFO_("%02x%02x\n", (uint8_t)rssi, crc_corr);
810 
811  /* MS bit CRC OK/Not OK, 7 LS Bits, Correlation value */
812  if(crc_corr & CRC_BIT_MASK) {
813  packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
814  packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
815  } else {
816  LOG_ERR("Bad CRC\n");
818  return 0;
819  }
820 
821  if(!poll_mode) {
822  /* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
823  if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
825  process_poll(&cc2538_rf_process);
826  } else {
828  }
829  }
830  }
831 
832  return len;
833 }
834 /*---------------------------------------------------------------------------*/
835 static int
836 receiving_packet(void)
837 {
838  LOG_INFO("Receiving\n");
839 
840  /*
841  * SFD high while transmitting and receiving.
842  * TX_ACTIVE high only when transmitting
843  *
844  * FSMSTAT1 & (TX_ACTIVE | SFD) == SFD <=> receiving
845  */
846  return (REG(RFCORE_XREG_FSMSTAT1)
849 }
850 /*---------------------------------------------------------------------------*/
851 static int
852 pending_packet(void)
853 {
854  LOG_INFO("Pending\n");
855 
857 }
858 /*---------------------------------------------------------------------------*/
859 static radio_result_t
860 get_value(radio_param_t param, radio_value_t *value)
861 {
862  if(!value) {
863  return RADIO_RESULT_INVALID_VALUE;
864  }
865 
866  switch(param) {
867  case RADIO_PARAM_POWER_MODE:
869  *value = RADIO_POWER_MODE_OFF;
870  } else {
872  ? RADIO_POWER_MODE_ON : RADIO_POWER_MODE_CARRIER_ON;
873  }
874  return RADIO_RESULT_OK;
875  case RADIO_PARAM_CHANNEL:
876  *value = (radio_value_t)get_channel();
877  return RADIO_RESULT_OK;
878  case RADIO_PARAM_PAN_ID:
879  *value = get_pan_id();
880  return RADIO_RESULT_OK;
881  case RADIO_PARAM_16BIT_ADDR:
882  *value = get_short_addr();
883  return RADIO_RESULT_OK;
884  case RADIO_PARAM_RX_MODE:
885  *value = 0;
888  }
890  *value |= RADIO_RX_MODE_AUTOACK;
891  }
892  if(poll_mode) {
893  *value |= RADIO_RX_MODE_POLL_MODE;
894  }
895  return RADIO_RESULT_OK;
896  case RADIO_PARAM_TX_MODE:
897  *value = 0;
898  if(send_on_cca) {
899  *value |= RADIO_TX_MODE_SEND_ON_CCA;
900  }
901  return RADIO_RESULT_OK;
902  case RADIO_PARAM_TXPOWER:
903  *value = get_tx_power();
904  return RADIO_RESULT_OK;
905  case RADIO_PARAM_CCA_THRESHOLD:
906  *value = get_cca_threshold();
907  return RADIO_RESULT_OK;
908  case RADIO_PARAM_RSSI:
909  *value = get_rssi();
910  return RADIO_RESULT_OK;
911  case RADIO_PARAM_LAST_RSSI:
912  *value = rssi;
913  return RADIO_RESULT_OK;
914  case RADIO_PARAM_LAST_LINK_QUALITY:
915  *value = crc_corr & LQI_BIT_MASK;
916  return RADIO_RESULT_OK;
917  case RADIO_CONST_CHANNEL_MIN:
918  *value = CC2538_RF_CHANNEL_MIN;
919  return RADIO_RESULT_OK;
920  case RADIO_CONST_CHANNEL_MAX:
921  *value = CC2538_RF_CHANNEL_MAX;
922  return RADIO_RESULT_OK;
923  case RADIO_CONST_TXPOWER_MIN:
924  *value = OUTPUT_POWER_MIN;
925  return RADIO_RESULT_OK;
926  case RADIO_CONST_TXPOWER_MAX:
927  *value = OUTPUT_POWER_MAX;
928  return RADIO_RESULT_OK;
929  case RADIO_CONST_PHY_OVERHEAD:
930  *value = (radio_value_t)3; /* 1 len byte, 2 bytes CRC */
931  return RADIO_RESULT_OK;
932  case RADIO_CONST_BYTE_AIR_TIME:
933  *value = (radio_value_t)32; /* 250kbps data rate. One byte = 32us.*/
934  return RADIO_RESULT_OK;
935  case RADIO_CONST_DELAY_BEFORE_TX:
936  *value = (radio_value_t)CC2538_DELAY_BEFORE_TX;
937  return RADIO_RESULT_OK;
938  case RADIO_CONST_DELAY_BEFORE_RX:
939  *value = (radio_value_t)CC2538_DELAY_BEFORE_RX;
940  return RADIO_RESULT_OK;
941  case RADIO_CONST_DELAY_BEFORE_DETECT:
942  *value = (radio_value_t)CC2538_DELAY_BEFORE_DETECT;
943  return RADIO_RESULT_OK;
944  case RADIO_CONST_MAX_PAYLOAD_LEN:
945  *value = (radio_value_t)MAX_PAYLOAD_LEN;
946  return RADIO_RESULT_OK;
947  default:
948  return RADIO_RESULT_NOT_SUPPORTED;
949  }
950 }
951 /*---------------------------------------------------------------------------*/
952 static radio_result_t
953 set_value(radio_param_t param, radio_value_t value)
954 {
955  switch(param) {
956  case RADIO_PARAM_POWER_MODE:
957  if(value == RADIO_POWER_MODE_ON) {
958  on();
959  return RADIO_RESULT_OK;
960  }
961  if(value == RADIO_POWER_MODE_OFF) {
962  off();
963  return RADIO_RESULT_OK;
964  }
965  if(value == RADIO_POWER_MODE_CARRIER_ON ||
966  value == RADIO_POWER_MODE_CARRIER_OFF) {
967  set_test_mode((value == RADIO_POWER_MODE_CARRIER_ON), 0);
968  return RADIO_RESULT_OK;
969  }
970  return RADIO_RESULT_INVALID_VALUE;
971  case RADIO_PARAM_CHANNEL:
972  if(value < CC2538_RF_CHANNEL_MIN ||
973  value > CC2538_RF_CHANNEL_MAX) {
974  return RADIO_RESULT_INVALID_VALUE;
975  }
976  set_channel(value);
977  return RADIO_RESULT_OK;
978  case RADIO_PARAM_PAN_ID:
979  set_pan_id(value & 0xffff);
980  return RADIO_RESULT_OK;
981  case RADIO_PARAM_16BIT_ADDR:
982  set_short_addr(value & 0xffff);
983  return RADIO_RESULT_OK;
984  case RADIO_PARAM_RX_MODE:
985  if(value & ~(RADIO_RX_MODE_ADDRESS_FILTER |
986  RADIO_RX_MODE_AUTOACK |
987  RADIO_RX_MODE_POLL_MODE)) {
988  return RADIO_RESULT_INVALID_VALUE;
989  }
990 
991  set_frame_filtering((value & RADIO_RX_MODE_ADDRESS_FILTER) != 0);
992  set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
993  set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
994 
995  return RADIO_RESULT_OK;
996  case RADIO_PARAM_TX_MODE:
997  if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
998  return RADIO_RESULT_INVALID_VALUE;
999  }
1000  set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
1001  return RADIO_RESULT_OK;
1002  case RADIO_PARAM_TXPOWER:
1003  if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
1004  return RADIO_RESULT_INVALID_VALUE;
1005  }
1006 
1007  set_tx_power(value);
1008  return RADIO_RESULT_OK;
1009  case RADIO_PARAM_CCA_THRESHOLD:
1010  set_cca_threshold(value);
1011  return RADIO_RESULT_OK;
1012  case RADIO_PARAM_SHR_SEARCH:
1013  set_shr_search(value);
1014  return RADIO_RESULT_OK;
1015  default:
1016  return RADIO_RESULT_NOT_SUPPORTED;
1017  }
1018 }
1019 /*---------------------------------------------------------------------------*/
1020 static radio_result_t
1021 get_object(radio_param_t param, void *dest, size_t size)
1022 {
1023  uint8_t *target;
1024  int i;
1025 
1026  if(param == RADIO_PARAM_64BIT_ADDR) {
1027  if(size != 8 || !dest) {
1028  return RADIO_RESULT_INVALID_VALUE;
1029  }
1030 
1031  target = dest;
1032  for(i = 0; i < 8; i++) {
1033  target[i] = ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[7 - i] & 0xFF;
1034  }
1035 
1036  return RADIO_RESULT_OK;
1037  }
1038 
1039  if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
1040  if(size != sizeof(rtimer_clock_t) || !dest) {
1041  return RADIO_RESULT_INVALID_VALUE;
1042  }
1043  *(rtimer_clock_t *)dest = get_sfd_timestamp();
1044  return RADIO_RESULT_OK;
1045  }
1046 
1047 #if MAC_CONF_WITH_TSCH
1048  if(param == RADIO_CONST_TSCH_TIMING) {
1049  if(size != sizeof(uint16_t *) || !dest) {
1050  return RADIO_RESULT_INVALID_VALUE;
1051  }
1052  /* Assigned value: a pointer to the TSCH timing in usec */
1053  *(const uint16_t **)dest = tsch_timeslot_timing_us_10000;
1054  return RADIO_RESULT_OK;
1055  }
1056 #endif /* MAC_CONF_WITH_TSCH */
1057 
1058  return RADIO_RESULT_NOT_SUPPORTED;
1059 }
1060 /*---------------------------------------------------------------------------*/
1061 static radio_result_t
1062 set_object(radio_param_t param, const void *src, size_t size)
1063 {
1064  int i;
1065 
1066  if(param == RADIO_PARAM_64BIT_ADDR) {
1067  if(size != 8 || !src) {
1068  return RADIO_RESULT_INVALID_VALUE;
1069  }
1070 
1071  for(i = 0; i < 8; i++) {
1072  ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[i] = ((uint8_t *)src)[7 - i];
1073  }
1074 
1075  return RADIO_RESULT_OK;
1076  }
1077  return RADIO_RESULT_NOT_SUPPORTED;
1078 }
1079 /*---------------------------------------------------------------------------*/
1081  init,
1082  prepare,
1083  transmit,
1084  send,
1085  read,
1086  channel_clear,
1089  on,
1090  off,
1091  get_value,
1092  set_value,
1093  get_object,
1094  set_object
1095 };
1096 /*---------------------------------------------------------------------------*/
1097 /**
1098  * \brief Implementation of the cc2538 RF driver process
1099  *
1100  * This process is started by init(). It simply sits there waiting for
1101  * an event. Upon frame reception, the RX ISR will poll this process.
1102  * Subsequently, the contiki core will generate an event which will
1103  * call this process so that the received frame can be picked up from
1104  * the RF RX FIFO
1105  *
1106  */
1107 PROCESS_THREAD(cc2538_rf_process, ev, data)
1108 {
1109  int len;
1110  PROCESS_BEGIN();
1111 
1112  while(1) {
1113  /* Only if we are not in poll mode oder we are in poll mode and transceiver has to be reset */
1114  PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
1115 
1116  if(!poll_mode) {
1117  packetbuf_clear();
1119 
1120  if(len > 0) {
1121  packetbuf_set_datalen(len);
1122 
1123  NETSTACK_MAC.input();
1124  }
1125  }
1126 
1127  /* If we were polled due to an RF error, reset the transceiver */
1128  if(rf_flags & RF_MUST_RESET) {
1129  uint8_t was_on;
1130  rf_flags = 0;
1131 
1132  /* save state so we know if to switch on again after re-init */
1134  was_on = 0;
1135  } else {
1136  was_on = 1;
1137  }
1138  off();
1139  init();
1140  if(was_on) {
1141  /* switch back on */
1142  on();
1143  }
1144  }
1145  }
1146 
1147  PROCESS_END();
1148 }
1149 /*---------------------------------------------------------------------------*/
1150 /**
1151  * \brief The cc2538 RF RX/TX ISR
1152  *
1153  * This is the interrupt service routine for all RF interrupts relating
1154  * to RX and TX. Error conditions are handled by cc2538_rf_err_isr().
1155  * Currently, we only acknowledge the FIFOP interrupt source.
1156  */
1157 void
1159 {
1160  if(!poll_mode) {
1161  process_poll(&cc2538_rf_process);
1162  }
1163 
1164  /* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
1165  REG(RFCORE_SFR_RFIRQF0) = 0;
1166 }
1167 /*---------------------------------------------------------------------------*/
1168 /**
1169  * \brief The cc2538 RF Error ISR
1170  *
1171  * This is the interrupt service routine for all RF errors. We
1172  * acknowledge every error type and instead of trying to be smart and
1173  * act differently depending on error condition, we simply reset the
1174  * transceiver. RX FIFO overflow is an exception, we ignore this error
1175  * since read() handles it anyway.
1176  *
1177  * However, we don't want to reset within this ISR. If the error occurs
1178  * while we are reading a frame out of the FIFO, trashing the FIFO in
1179  * the middle of read(), would result in further errors (RX underflows).
1180  *
1181  * Instead, we set a flag and poll the driver process. The process will
1182  * reset the transceiver without any undesirable consequences.
1183  */
1184 void
1186 {
1187  LOG_ERR("Error 0x%08lx occurred\n", REG(RFCORE_SFR_RFERRF));
1188 
1189  /* If the error is not an RX FIFO overflow, set a flag */
1191  rf_flags |= RF_MUST_RESET;
1192  }
1193 
1194  REG(RFCORE_SFR_RFERRF) = 0;
1195 
1196  process_poll(&cc2538_rf_process);
1197 }
1198 /*---------------------------------------------------------------------------*/
1199 
1200 /** @} */
radio_result_t(* get_object)(radio_param_t param, void *dest, size_t size)
Get a radio parameter object.
Definition: radio.h:328
#define RFCORE_FFSM_SHORT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:64
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
Definition: packetbuf.c:143
Top-level header file for cc2538 RF Core registers.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
Definition: radio.h:290
#define RFCORE_SFR_MTM1_MTM1
Register[15:8].
Definition: rfcore-sfr.h:116
#define RFCORE_XREG_SRCMATCH
Source address matching.
Definition: rfcore-xreg.h:46
#define SYS_CTRL_RCGCRFC
RF Core clocks - active mode.
Definition: sys-ctrl.h:93
#define PROCESS(name, strname)
Declare a process.
Definition: process.h:307
#define RFCORE_SFR_MTCTRL_SYNC
Timer start/stop timing.
Definition: rfcore-sfr.h:79
#define RFCORE_SFR_MTMOVF0
MAC Timer MUX overflow 0.
Definition: rfcore-sfr.h:54
#define RFCORE_XREG_FRMCTRL0_AUTOACK
Transmit ACK frame enable.
Definition: rfcore-xreg.h:211
Header file for the cc2538 System Control driver.
#define RFCORE_XREG_FSMSTAT0
Radio status register.
Definition: rfcore-xreg.h:62
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
Sets the channel&#39;s destination address.
Definition: udma.c:80
void packetbuf_clear(void)
Clear and reset the packetbuf.
Definition: packetbuf.c:75
#define RFCORE_SFR_MTM1
MAC Timer MUX register 1.
Definition: rfcore-sfr.h:51
#define SYS_CTRL_SCGCRFC
RF Core clocks - Sleep mode.
Definition: sys-ctrl.h:94
#define RFCORE_XREG_FSMSTAT1
Radio status register.
Definition: rfcore-xreg.h:63
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.
Definition: uip-nd6.c:107
#define RFCORE_SFR_MTCTRL_LATCH_MODE
OVF counter latch mode.
Definition: rfcore-sfr.h:77
Header file for the cc2538 RF driver.
Header file for the energy estimation mechanism
#define CC2538_RF_CSP_ISFLUSHTX()
Flush the TX FIFO.
Definition: cc2538-rf.h:120
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
Definition: process.h:178
Header file for the radio API
#define PROCESS_BEGIN()
Define the beginning of a process.
Definition: process.h:120
#define RFCORE_SFR_MTMOVF0_MTMOVF0
Register[7:0].
Definition: rfcore-sfr.h:124
Header file for the link-layer address representation
#define PROCESS_END()
Define the end of a process.
Definition: process.h:131
int(* receiving_packet)(void)
Check if the radio driver is currently receiving a packet.
Definition: radio.h:306
#define RFCORE_XREG_MDMTEST1
Test Register for Modem.
Definition: rfcore-xreg.h:100
#define RFCORE_FFSM_SHORT_ADDR1
Local address information.
Definition: rfcore-ffsm.h:65
#define RFCORE_SFR_MTCTRL_RUN
Timer start/stop.
Definition: rfcore-sfr.h:80
radio_result_t(* set_value)(radio_param_t param, radio_value_t value)
Set a radio parameter value.
Definition: radio.h:321
int(* pending_packet)(void)
Check if the radio driver has just received a packet.
Definition: radio.h:309
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
Definition: clock.c:150
The structure of a device driver for a radio in Contiki.
Definition: radio.h:285
static void set_channel(uint8_t channel)
Set the current operating channel.
Definition: cc2538-rf.c:175
#define RFCORE_XREG_FSMSTAT1_SFD
SFD was sent/received.
Definition: rfcore-xreg.h:283
Header file with register manipulation macro definitions.
#define RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN
Enables frame filtering.
Definition: rfcore-xreg.h:149
#define RFCORE_XREG_CCACTRL0_CCA_THR
Clear-channel-assessment.
Definition: rfcore-xreg.h:307
int(* channel_clear)(void)
Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not...
Definition: radio.h:303
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio...
Definition: radio.h:88
#define CC2538_RF_CONF_RX_DMA_CHAN
RAM -> RF DMA channel.
Definition: cc2538-conf.h:96
#define RFCORE_SFR_MTMSEL
MAC Timer multiplex select.
Definition: rfcore-sfr.h:49
#define RFCORE_SFR_RFDATA
TX/RX FIFO data.
Definition: rfcore-sfr.h:60
const struct radio_driver cc2538_rf_driver
The NETSTACK data structure for the cc2538 RF driver.
Definition: cc2538-rf.c:1080
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
#define CC2538_RF_CONF_TX_DMA_CHAN
RF -> RAM DMA channel.
Definition: cc2538-conf.h:95
#define RFCORE_XREG_FSMSTAT1_TX_ACTIVE
Status signal - TX states.
Definition: rfcore-xreg.h:287
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
Definition: udma.c:204
#define RFCORE_XREG_RFERRM_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:393
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
Definition: core_cm0.h:653
#define IEEE802154_DEFAULT_CHANNEL
The default channel for IEEE 802.15.4 networks.
Definition: mac.h:52
#define RTIMER_NOW()
Get the current clock time.
Definition: rtimer.h:185
#define RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE
FIFO and FFCTRL status.
Definition: rfcore-xreg.h:275
#define RFCORE_FFSM_EXT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:54
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
Definition: core_cm0.h:642
#define CC2538_RF_CSP_ISRXON()
Send an RX ON command strobe to the CSP.
Definition: cc2538-rf.h:95
RF Tx/Rx Interrupt.
Definition: cc2538_cm3.h:109
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
Definition: udma.c:70
#define RFCORE_XREG_FSCAL1
Tune frequency calibration.
Definition: rfcore-xreg.h:89
#define RFCORE_XREG_TXPOWER
Controls the output power.
Definition: rfcore-xreg.h:60
void(* input)(void)
Callback for getting notified of incoming packet.
Definition: mac.h:72
#define RFCORE_XREG_FSMSTAT1_FIFO
FIFO status.
Definition: rfcore-xreg.h:281
#define CC2538_RF_CSP_ISRFOFF()
Send a RF OFF command strobe to the CSP.
Definition: cc2538-rf.h:107
#define RFCORE_XREG_RFIRQM0
RF interrupt masks.
Definition: rfcore-xreg.h:79
int(* send)(const void *payload, unsigned short payload_len)
Prepare & transmit a packet.
Definition: radio.h:296
int(* transmit)(unsigned short transmit_len)
Send the packet that has previously been prepared.
Definition: radio.h:293
#define RFCORE_XREG_RSSISTAT
RSSI valid status register.
Definition: rfcore-xreg.h:69
#define RFCORE_XREG_FRMCTRL0_TX_MODE
Set test modes for TX.
Definition: rfcore-xreg.h:214
void process_poll(struct process *p)
Request a process to be polled.
Definition: process.c:371
int(* off)(void)
Turn the radio off.
Definition: radio.h:315
#define RFCORE_FFSM_PAN_ID0
Local address information.
Definition: rfcore-ffsm.h:62
#define RFCORE_XREG_FRMCTRL0
Frame handling.
Definition: rfcore-xreg.h:53
#define RFCORE_XREG_FSMSTAT1_FIFOP
FIFOP status.
Definition: rfcore-xreg.h:282
#define RFCORE_XREG_RFIRQM0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-xreg.h:373
void cc2538_rf_err_isr(void)
The cc2538 RF Error ISR.
Definition: cc2538-rf.c:1185
#define RFCORE_XREG_FREQCTRL
Controls the RF frequency.
Definition: rfcore-xreg.h:59
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
Definition: udma.c:120
Header file for the real-time timer module.
#define RFCORE_SFR_MTM0
MAC Timer MUX register 0.
Definition: rfcore-sfr.h:50
#define RFCORE_XREG_FRMCTRL0_RX_MODE
Set RX modes.
Definition: rfcore-xreg.h:213
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
Definition: packetbuf.h:67
#define RFCORE_XREG_FSMSTAT1_CCA
Clear channel assessment.
Definition: rfcore-xreg.h:284
#define RFCORE_XREG_TXFILTCFG
TX filter configuration.
Definition: rfcore-xreg.h:141
Main API declarations for TSCH.
#define RFCORE_FFSM_PAN_ID1
Local address information.
Definition: rfcore-ffsm.h:63
#define RADIO_RX_MODE_ADDRESS_FILTER
The radio reception mode controls address filtering and automatic transmission of acknowledgements in...
Definition: radio.h:252
#define RFCORE_SFR_MTMOVF2
MAC Timer MUX overflow 2.
Definition: rfcore-sfr.h:52
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
Definition: udma.c:225
#define RFCORE_XREG_FIFOPCTRL
FIFOP threshold.
Definition: rfcore-xreg.h:64
#define RADIO_TX_MODE_SEND_ON_CCA
The radio transmission mode controls whether transmissions should be done using clear channel assessm...
Definition: radio.h:264
#define RFCORE_SFR_RFIRQF0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-sfr.h:164
void cc2538_rf_rx_tx_isr(void)
The cc2538 RF RX/TX ISR.
Definition: cc2538-rf.c:1158
#define RFCORE_SFR_MTMOVF1_MTMOVF1
Register[15:8].
Definition: rfcore-sfr.h:123
RF Error Interrupt.
Definition: cc2538_cm3.h:110
#define RFCORE_XREG_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:81
static radio_value_t get_rssi(void)
Reads the current signal strength (RSSI)
Definition: cc2538-rf.c:233
#define RFCORE_SFR_MTCTRL_STATE
State of MAC Timer.
Definition: rfcore-sfr.h:78
#define CC2538_RF_CSP_ISTXON()
Send a TX ON command strobe to the CSP.
Definition: cc2538-rf.h:101
#define RFCORE_SFR_MTMOVF2_MTMOVF2
Register[23:16].
Definition: rfcore-sfr.h:117
#define RFCORE_SFR_MTCTRL
MAC Timer control register.
Definition: rfcore-sfr.h:46
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
Definition: radio.h:299
#define RFCORE_XREG_CCACTRL0
CCA threshold.
Definition: rfcore-xreg.h:66
#define CC2538_RF_CSP_ISFLUSHRX()
Flush the RX FIFO.
Definition: cc2538-rf.h:113
#define RFCORE_XREG_RSSI
RSSI status register.
Definition: rfcore-xreg.h:68
#define RFCORE_SFR_MTMOVF1
MAC Timer MUX overflow 1.
Definition: rfcore-sfr.h:53
Header file for the Packet buffer (packetbuf) management
Include file for the Contiki low-layer network stack (NETSTACK)
radio_result_t(* get_value)(radio_param_t param, radio_value_t *value)
Get a radio parameter value.
Definition: radio.h:318
#define RFCORE_XREG_FRMCTRL0_AUTOCRC
Auto CRC generation / checking.
Definition: rfcore-xreg.h:210
#define RFCORE_XREG_AGCCTRL1
AGC reference level.
Definition: rfcore-xreg.h:93
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel&#39;s control word.
Definition: udma.c:90
#define RFCORE_XREG_RSSISTAT_RSSI_VALID
RSSI value is valid.
Definition: rfcore-xreg.h:327
PROCESS_THREAD(cc2538_rf_process, ev, data)
Implementation of the cc2538 RF driver process.
Definition: cc2538-rf.c:1107
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
Definition: udma.h:697
#define RFCORE_XREG_RXENABLE_RXENMASK
Enables the receiver.
Definition: rfcore-xreg.h:228
#define CC2538_RF_CONF_RX_USE_DMA
RF RX over DMA.
Definition: cc2538-conf.h:232
static int init(void)
Definition: cc2538-rf.c:521
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
Definition: udma.c:235
#define RFCORE_SFR_RFERRF
RF error interrupt flags.
Definition: rfcore-sfr.h:61
Header file for the logging system
#define RFCORE_SFR_MTMSEL_MTMOVFSEL
MTMOVF register select.
Definition: rfcore-sfr.h:108
radio_result_t(* set_object)(radio_param_t param, const void *src, size_t size)
Set a radio parameter object.
Definition: radio.h:334
#define RFCORE_SFR_RFERRF_RXOVERF
RX FIFO overflowed.
Definition: rfcore-sfr.h:140
#define RFCORE_SFR_MTMSEL_MTMSEL
MTM register select.
Definition: rfcore-sfr.h:109
#define SYS_CTRL_DCGCRFC
RF Core clocks - PM0.
Definition: sys-ctrl.h:95
#define RFCORE_XREG_RXENABLE
RX enabling.
Definition: rfcore-xreg.h:55
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
Definition: packetbuf.c:136
const tsch_timeslot_timing_usec tsch_timeslot_timing_us_10000
TSCH timing attributes and description.
int(* on)(void)
Turn the radio on.
Definition: radio.h:312
#define CC2538_RF_CONF_TX_USE_DMA
RF TX over DMA.
Definition: cc2538-conf.h:228
#define RFCORE_SFR_MTM0_MTM0
Register[7:0].
Definition: rfcore-sfr.h:115
#define RFCORE_SFR_RFIRQF0
RF interrupt flags.
Definition: rfcore-sfr.h:63
void process_start(struct process *p, process_data_t data)
Start a process.
Definition: process.c:99
static uint8_t get_channel()
Get the current operating channel.
Definition: cc2538-rf.c:165
#define RFCORE_XREG_FRMFILT0
Frame filtering control.
Definition: rfcore-xreg.h:44