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Type definitions for the Instrumentation Trace Macrocell (ITM) More...
Data Structures | |
struct | ITM_Type |
Structure type to access the Instrumentation Trace Macrocell Register (ITM). More... | |
Macros | |
#define | ITM_TPR_PRIVMASK_Pos 0U |
#define | ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
#define | ITM_TCR_BUSY_Pos 23U |
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
#define | ITM_TCR_TraceBusID_Pos 16U |
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
#define | ITM_TCR_GTSFREQ_Pos 10U |
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
#define | ITM_TCR_TSPrescale_Pos 8U |
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
#define | ITM_TCR_SWOENA_Pos 4U |
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
#define | ITM_TCR_DWTENA_Pos 3U |
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
#define | ITM_TCR_SYNCENA_Pos 2U |
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
#define | ITM_TCR_TSENA_Pos 1U |
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
#define | ITM_TCR_ITMENA_Pos 0U |
#define | ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
#define | ITM_IWR_ATVALIDM_Pos 0U |
#define | ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
#define | ITM_IRR_ATREADYM_Pos 0U |
#define | ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
#define | ITM_IMCR_INTEGRATION_Pos 0U |
#define | ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
#define | ITM_LSR_ByteAcc_Pos 2U |
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
#define | ITM_LSR_Access_Pos 1U |
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
#define | ITM_LSR_Present_Pos 0U |
#define | ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
#define | ITM_TPR_PRIVMASK_Pos 0U |
#define | ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
#define | ITM_TCR_BUSY_Pos 23U |
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
#define | ITM_TCR_TraceBusID_Pos 16U |
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
#define | ITM_TCR_GTSFREQ_Pos 10U |
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
#define | ITM_TCR_TSPrescale_Pos 8U |
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
#define | ITM_TCR_SWOENA_Pos 4U |
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
#define | ITM_TCR_DWTENA_Pos 3U |
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
#define | ITM_TCR_SYNCENA_Pos 2U |
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
#define | ITM_TCR_TSENA_Pos 1U |
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
#define | ITM_TCR_ITMENA_Pos 0U |
#define | ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
#define | ITM_IWR_ATVALIDM_Pos 0U |
#define | ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
#define | ITM_IRR_ATREADYM_Pos 0U |
#define | ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
#define | ITM_IMCR_INTEGRATION_Pos 0U |
#define | ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
#define | ITM_LSR_ByteAcc_Pos 2U |
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
#define | ITM_LSR_Access_Pos 1U |
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
#define | ITM_LSR_Present_Pos 0U |
#define | ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
#define | ITM_TPR_PRIVMASK_Pos 0U |
#define | ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
#define | ITM_TCR_BUSY_Pos 23U |
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
#define | ITM_TCR_TraceBusID_Pos 16U |
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
#define | ITM_TCR_GTSFREQ_Pos 10U |
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
#define | ITM_TCR_TSPrescale_Pos 8U |
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
#define | ITM_TCR_SWOENA_Pos 4U |
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
#define | ITM_TCR_DWTENA_Pos 3U |
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
#define | ITM_TCR_SYNCENA_Pos 2U |
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
#define | ITM_TCR_TSENA_Pos 1U |
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
#define | ITM_TCR_ITMENA_Pos 0U |
#define | ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
#define | ITM_IWR_ATVALIDM_Pos 0U |
#define | ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
#define | ITM_IRR_ATREADYM_Pos 0U |
#define | ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
#define | ITM_IMCR_INTEGRATION_Pos 0U |
#define | ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
#define | ITM_LSR_ByteAcc_Pos 2U |
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
#define | ITM_LSR_Access_Pos 1U |
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
#define | ITM_LSR_Present_Pos 0U |
#define | ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
#define | ITM_TPR_PRIVMASK_Pos 0U |
#define | ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
#define | ITM_TCR_BUSY_Pos 23U |
#define | ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
#define | ITM_TCR_TraceBusID_Pos 16U |
#define | ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
#define | ITM_TCR_GTSFREQ_Pos 10U |
#define | ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
#define | ITM_TCR_TSPrescale_Pos 8U |
#define | ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
#define | ITM_TCR_SWOENA_Pos 4U |
#define | ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
#define | ITM_TCR_DWTENA_Pos 3U |
#define | ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
#define | ITM_TCR_SYNCENA_Pos 2U |
#define | ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
#define | ITM_TCR_TSENA_Pos 1U |
#define | ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
#define | ITM_TCR_ITMENA_Pos 0U |
#define | ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
#define | ITM_IWR_ATVALIDM_Pos 0U |
#define | ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
#define | ITM_IRR_ATREADYM_Pos 0U |
#define | ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
#define | ITM_IMCR_INTEGRATION_Pos 0U |
#define | ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
#define | ITM_LSR_ByteAcc_Pos 2U |
#define | ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
#define | ITM_LSR_Access_Pos 1U |
#define | ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
#define | ITM_LSR_Present_Pos 0U |
#define | ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
Type definitions for the Instrumentation Trace Macrocell (ITM)
#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
ITM IMCR: INTEGRATION Mask
Definition at line 795 of file core_sc300.h.
#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
ITM IMCR: INTEGRATION Mask
Definition at line 813 of file core_cm3.h.
#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
ITM IMCR: INTEGRATION Mask
Definition at line 874 of file core_cm4.h.
#define ITM_IMCR_INTEGRATION_Msk (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/) |
ITM IMCR: INTEGRATION Mask
Definition at line 1076 of file core_cm7.h.
#define ITM_IMCR_INTEGRATION_Pos 0U |
ITM IMCR: INTEGRATION Position
Definition at line 794 of file core_sc300.h.
#define ITM_IMCR_INTEGRATION_Pos 0U |
ITM IMCR: INTEGRATION Position
Definition at line 812 of file core_cm3.h.
#define ITM_IMCR_INTEGRATION_Pos 0U |
ITM IMCR: INTEGRATION Position
Definition at line 873 of file core_cm4.h.
#define ITM_IMCR_INTEGRATION_Pos 0U |
ITM IMCR: INTEGRATION Position
Definition at line 1075 of file core_cm7.h.
#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
ITM IRR: ATREADYM Mask
Definition at line 791 of file core_sc300.h.
#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
ITM IRR: ATREADYM Mask
Definition at line 809 of file core_cm3.h.
#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
ITM IRR: ATREADYM Mask
Definition at line 870 of file core_cm4.h.
#define ITM_IRR_ATREADYM_Msk (1UL /*<< ITM_IRR_ATREADYM_Pos*/) |
ITM IRR: ATREADYM Mask
Definition at line 1072 of file core_cm7.h.
#define ITM_IRR_ATREADYM_Pos 0U |
ITM IRR: ATREADYM Position
Definition at line 790 of file core_sc300.h.
#define ITM_IRR_ATREADYM_Pos 0U |
ITM IRR: ATREADYM Position
Definition at line 808 of file core_cm3.h.
#define ITM_IRR_ATREADYM_Pos 0U |
ITM IRR: ATREADYM Position
Definition at line 869 of file core_cm4.h.
#define ITM_IRR_ATREADYM_Pos 0U |
ITM IRR: ATREADYM Position
Definition at line 1071 of file core_cm7.h.
#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
ITM IWR: ATVALIDM Mask
Definition at line 787 of file core_sc300.h.
#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
ITM IWR: ATVALIDM Mask
Definition at line 805 of file core_cm3.h.
#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
ITM IWR: ATVALIDM Mask
Definition at line 866 of file core_cm4.h.
#define ITM_IWR_ATVALIDM_Msk (1UL /*<< ITM_IWR_ATVALIDM_Pos*/) |
ITM IWR: ATVALIDM Mask
Definition at line 1068 of file core_cm7.h.
#define ITM_IWR_ATVALIDM_Pos 0U |
ITM IWR: ATVALIDM Position
Definition at line 786 of file core_sc300.h.
#define ITM_IWR_ATVALIDM_Pos 0U |
ITM IWR: ATVALIDM Position
Definition at line 804 of file core_cm3.h.
#define ITM_IWR_ATVALIDM_Pos 0U |
ITM IWR: ATVALIDM Position
Definition at line 865 of file core_cm4.h.
#define ITM_IWR_ATVALIDM_Pos 0U |
ITM IWR: ATVALIDM Position
Definition at line 1067 of file core_cm7.h.
#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 802 of file core_sc300.h.
#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 820 of file core_cm3.h.
#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 881 of file core_cm4.h.
#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) |
ITM LSR: Access Mask
Definition at line 1083 of file core_cm7.h.
#define ITM_LSR_Access_Pos 1U |
ITM LSR: Access Position
Definition at line 801 of file core_sc300.h.
#define ITM_LSR_Access_Pos 1U |
ITM LSR: Access Position
Definition at line 819 of file core_cm3.h.
#define ITM_LSR_Access_Pos 1U |
ITM LSR: Access Position
Definition at line 880 of file core_cm4.h.
#define ITM_LSR_Access_Pos 1U |
ITM LSR: Access Position
Definition at line 1082 of file core_cm7.h.
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 799 of file core_sc300.h.
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 817 of file core_cm3.h.
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 878 of file core_cm4.h.
#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) |
ITM LSR: ByteAcc Mask
Definition at line 1080 of file core_cm7.h.
#define ITM_LSR_ByteAcc_Pos 2U |
ITM LSR: ByteAcc Position
Definition at line 798 of file core_sc300.h.
#define ITM_LSR_ByteAcc_Pos 2U |
ITM LSR: ByteAcc Position
Definition at line 816 of file core_cm3.h.
#define ITM_LSR_ByteAcc_Pos 2U |
ITM LSR: ByteAcc Position
Definition at line 877 of file core_cm4.h.
#define ITM_LSR_ByteAcc_Pos 2U |
ITM LSR: ByteAcc Position
Definition at line 1079 of file core_cm7.h.
#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
ITM LSR: Present Mask
Definition at line 805 of file core_sc300.h.
#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
ITM LSR: Present Mask
Definition at line 823 of file core_cm3.h.
#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
ITM LSR: Present Mask
Definition at line 884 of file core_cm4.h.
#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) |
ITM LSR: Present Mask
Definition at line 1086 of file core_cm7.h.
#define ITM_LSR_Present_Pos 0U |
ITM LSR: Present Position
Definition at line 804 of file core_sc300.h.
#define ITM_LSR_Present_Pos 0U |
ITM LSR: Present Position
Definition at line 822 of file core_cm3.h.
#define ITM_LSR_Present_Pos 0U |
ITM LSR: Present Position
Definition at line 883 of file core_cm4.h.
#define ITM_LSR_Present_Pos 0U |
ITM LSR: Present Position
Definition at line 1085 of file core_cm7.h.
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 759 of file core_sc300.h.
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 777 of file core_cm3.h.
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 838 of file core_cm4.h.
#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) |
ITM TCR: BUSY Mask
Definition at line 1040 of file core_cm7.h.
#define ITM_TCR_BUSY_Pos 23U |
ITM TCR: BUSY Position
Definition at line 758 of file core_sc300.h.
#define ITM_TCR_BUSY_Pos 23U |
ITM TCR: BUSY Position
Definition at line 776 of file core_cm3.h.
#define ITM_TCR_BUSY_Pos 23U |
ITM TCR: BUSY Position
Definition at line 837 of file core_cm4.h.
#define ITM_TCR_BUSY_Pos 23U |
ITM TCR: BUSY Position
Definition at line 1039 of file core_cm7.h.
#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 774 of file core_sc300.h.
#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 792 of file core_cm3.h.
#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 853 of file core_cm4.h.
#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) |
ITM TCR: DWTENA Mask
Definition at line 1055 of file core_cm7.h.
#define ITM_TCR_DWTENA_Pos 3U |
ITM TCR: DWTENA Position
Definition at line 773 of file core_sc300.h.
#define ITM_TCR_DWTENA_Pos 3U |
ITM TCR: DWTENA Position
Definition at line 791 of file core_cm3.h.
#define ITM_TCR_DWTENA_Pos 3U |
ITM TCR: DWTENA Position
Definition at line 852 of file core_cm4.h.
#define ITM_TCR_DWTENA_Pos 3U |
ITM TCR: DWTENA Position
Definition at line 1054 of file core_cm7.h.
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 765 of file core_sc300.h.
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 783 of file core_cm3.h.
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 844 of file core_cm4.h.
#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) |
ITM TCR: Global timestamp frequency Mask
Definition at line 1046 of file core_cm7.h.
#define ITM_TCR_GTSFREQ_Pos 10U |
ITM TCR: Global timestamp frequency Position
Definition at line 764 of file core_sc300.h.
#define ITM_TCR_GTSFREQ_Pos 10U |
ITM TCR: Global timestamp frequency Position
Definition at line 782 of file core_cm3.h.
#define ITM_TCR_GTSFREQ_Pos 10U |
ITM TCR: Global timestamp frequency Position
Definition at line 843 of file core_cm4.h.
#define ITM_TCR_GTSFREQ_Pos 10U |
ITM TCR: Global timestamp frequency Position
Definition at line 1045 of file core_cm7.h.
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
ITM TCR: ITM Enable bit Mask
Definition at line 783 of file core_sc300.h.
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
ITM TCR: ITM Enable bit Mask
Definition at line 801 of file core_cm3.h.
Referenced by ITM_SendChar().
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
ITM TCR: ITM Enable bit Mask
Definition at line 862 of file core_cm4.h.
#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) |
ITM TCR: ITM Enable bit Mask
Definition at line 1064 of file core_cm7.h.
#define ITM_TCR_ITMENA_Pos 0U |
ITM TCR: ITM Enable bit Position
Definition at line 782 of file core_sc300.h.
#define ITM_TCR_ITMENA_Pos 0U |
ITM TCR: ITM Enable bit Position
Definition at line 800 of file core_cm3.h.
#define ITM_TCR_ITMENA_Pos 0U |
ITM TCR: ITM Enable bit Position
Definition at line 861 of file core_cm4.h.
#define ITM_TCR_ITMENA_Pos 0U |
ITM TCR: ITM Enable bit Position
Definition at line 1063 of file core_cm7.h.
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 771 of file core_sc300.h.
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 789 of file core_cm3.h.
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 850 of file core_cm4.h.
#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) |
ITM TCR: SWOENA Mask
Definition at line 1052 of file core_cm7.h.
#define ITM_TCR_SWOENA_Pos 4U |
ITM TCR: SWOENA Position
Definition at line 770 of file core_sc300.h.
#define ITM_TCR_SWOENA_Pos 4U |
ITM TCR: SWOENA Position
Definition at line 788 of file core_cm3.h.
#define ITM_TCR_SWOENA_Pos 4U |
ITM TCR: SWOENA Position
Definition at line 849 of file core_cm4.h.
#define ITM_TCR_SWOENA_Pos 4U |
ITM TCR: SWOENA Position
Definition at line 1051 of file core_cm7.h.
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 777 of file core_sc300.h.
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 795 of file core_cm3.h.
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 856 of file core_cm4.h.
#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) |
ITM TCR: SYNCENA Mask
Definition at line 1058 of file core_cm7.h.
#define ITM_TCR_SYNCENA_Pos 2U |
ITM TCR: SYNCENA Position
Definition at line 776 of file core_sc300.h.
#define ITM_TCR_SYNCENA_Pos 2U |
ITM TCR: SYNCENA Position
Definition at line 794 of file core_cm3.h.
#define ITM_TCR_SYNCENA_Pos 2U |
ITM TCR: SYNCENA Position
Definition at line 855 of file core_cm4.h.
#define ITM_TCR_SYNCENA_Pos 2U |
ITM TCR: SYNCENA Position
Definition at line 1057 of file core_cm7.h.
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 762 of file core_sc300.h.
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 780 of file core_cm3.h.
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 841 of file core_cm4.h.
#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) |
ITM TCR: ATBID Mask
Definition at line 1043 of file core_cm7.h.
#define ITM_TCR_TraceBusID_Pos 16U |
ITM TCR: ATBID Position
Definition at line 761 of file core_sc300.h.
#define ITM_TCR_TraceBusID_Pos 16U |
ITM TCR: ATBID Position
Definition at line 779 of file core_cm3.h.
#define ITM_TCR_TraceBusID_Pos 16U |
ITM TCR: ATBID Position
Definition at line 840 of file core_cm4.h.
#define ITM_TCR_TraceBusID_Pos 16U |
ITM TCR: ATBID Position
Definition at line 1042 of file core_cm7.h.
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 780 of file core_sc300.h.
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 798 of file core_cm3.h.
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 859 of file core_cm4.h.
#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) |
ITM TCR: TSENA Mask
Definition at line 1061 of file core_cm7.h.
#define ITM_TCR_TSENA_Pos 1U |
ITM TCR: TSENA Position
Definition at line 779 of file core_sc300.h.
#define ITM_TCR_TSENA_Pos 1U |
ITM TCR: TSENA Position
Definition at line 797 of file core_cm3.h.
#define ITM_TCR_TSENA_Pos 1U |
ITM TCR: TSENA Position
Definition at line 858 of file core_cm4.h.
#define ITM_TCR_TSENA_Pos 1U |
ITM TCR: TSENA Position
Definition at line 1060 of file core_cm7.h.
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 768 of file core_sc300.h.
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 786 of file core_cm3.h.
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 847 of file core_cm4.h.
#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) |
ITM TCR: TSPrescale Mask
Definition at line 1049 of file core_cm7.h.
#define ITM_TCR_TSPrescale_Pos 8U |
ITM TCR: TSPrescale Position
Definition at line 767 of file core_sc300.h.
#define ITM_TCR_TSPrescale_Pos 8U |
ITM TCR: TSPrescale Position
Definition at line 785 of file core_cm3.h.
#define ITM_TCR_TSPrescale_Pos 8U |
ITM TCR: TSPrescale Position
Definition at line 846 of file core_cm4.h.
#define ITM_TCR_TSPrescale_Pos 8U |
ITM TCR: TSPrescale Position
Definition at line 1048 of file core_cm7.h.
#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
ITM TPR: PRIVMASK Mask
Definition at line 755 of file core_sc300.h.
#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
ITM TPR: PRIVMASK Mask
Definition at line 773 of file core_cm3.h.
#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
ITM TPR: PRIVMASK Mask
Definition at line 834 of file core_cm4.h.
#define ITM_TPR_PRIVMASK_Msk (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/) |
ITM TPR: PRIVMASK Mask
Definition at line 1036 of file core_cm7.h.
#define ITM_TPR_PRIVMASK_Pos 0U |
ITM TPR: PRIVMASK Position
Definition at line 754 of file core_sc300.h.
#define ITM_TPR_PRIVMASK_Pos 0U |
ITM TPR: PRIVMASK Position
Definition at line 772 of file core_cm3.h.
#define ITM_TPR_PRIVMASK_Pos 0U |
ITM TPR: PRIVMASK Position
Definition at line 833 of file core_cm4.h.
#define ITM_TPR_PRIVMASK_Pos 0U |
ITM TPR: PRIVMASK Position
Definition at line 1035 of file core_cm7.h.