50#define RESET_PORT GPIO_PORT_TO_BASE(ETH_RESET_PORT)
51#define RESET_BIT GPIO_PIN_MASK(ETH_RESET_PIN)
54enc28j60_arch_spi_init(
void)
65enc28j60_arch_spi_select(
void)
67 SPIX_CS_CLR(ETH_SPI_CSN_PORT, ETH_SPI_CSN_PIN);
71enc28j60_arch_spi_deselect(
void)
73 SPIX_CS_SET(ETH_SPI_CSN_PORT, ETH_SPI_CSN_PIN);
77enc28j60_arch_spi_write(uint8_t
output)
79 SPIX_WAITFORTxREADY(ETH_SPI_INSTANCE);
80 SPIX_BUF(ETH_SPI_INSTANCE) =
output;
81 SPIX_WAITFOREOTx(ETH_SPI_INSTANCE);
82 SPIX_WAITFOREORx(ETH_SPI_INSTANCE);
83 uint32_t dummy = SPIX_BUF(ETH_SPI_INSTANCE);
88enc28j60_arch_spi_read(
void)
90 SPIX_WAITFORTxREADY(ETH_SPI_INSTANCE);
91 SPIX_BUF(ETH_SPI_INSTANCE) = 0;
92 SPIX_WAITFOREOTx(ETH_SPI_INSTANCE);
93 SPIX_WAITFOREORx(ETH_SPI_INSTANCE);
94 return SPIX_BUF(ETH_SPI_INSTANCE);
Header file with register and macro declarations for the cc2538 GPIO module.
#define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK)
Configure the pin to be software controlled with PIN_MASK of port with PORT_BASE.
#define GPIO_SET_INPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to input.
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to output.
void spix_set_mode(uint8_t spi, uint32_t frame_format, uint32_t clock_polarity, uint32_t clock_phase, uint32_t data_size)
Configure the SPI data and clock polarity and the data size for the instance given.
#define SSI_CR0_FRF_MOTOROLA
Motorola frame format.
void spix_init(uint8_t spi)
Initialize the SPI bus for the instance given.
void spix_cs_init(uint8_t port, uint8_t pin)
Configure a GPIO to be the chip select pin.
static uint8_t output(const linkaddr_t *localdest)
Take an IP packet and format it to be sent on an 802.15.4 network using 6lowpan.
Header file for the cc2538 SPI driver, including macros for the implementation of the low-level SPI p...