35#include "dev/radio/cc1200/cc1200-const.h"
36#include "dev/radio/cc1200/cc1200-conf.h"
37#include "dev/radio/cc1200/cc1200-arch.h"
38#include "dev/radio/cc1200/cc1200-rf-cfg.h"
43#include "dev/watchdog.h"
52static rtimer_clock_t sfd_timestamp = 0;
72#ifndef CC1200_RF_TESTMODE
73#define CC1200_RF_TESTMODE 0
78#if CC1200_RF_TESTMODE == 1
79#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
80#elif CC1200_RF_TESTMODE == 2
81#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
82#elif CC1200_RF_TESTMODE == 3
83#define CC1200_RF_CFG cc1200_802154g_863_870_fsk_50kbps
93#define CC1200_WITH_TX_BUF (!MAC_CONF_WITH_TSCH)
103#ifdef CC1200_CONF_PENDING_POLL_THROTTLE_US
104#define CC1200_PENDING_POLL_THROTTLE_US CC1200_CONF_PENDING_POLL_THROTTLE_US
106#define CC1200_PENDING_POLL_THROTTLE_US 300
115#define STATE_USES_MARC_STATE 0
122#if MAC_CONF_WITH_TSCH
138#define APPENDIX_LEN 2
144#if CC1200_MAX_PAYLOAD_LEN > (2048 - PHR_LEN)
145#error Payload length not supported by this driver
148#if CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)
150#error Payload length not supported without GPIO2
154#if CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)
156#error Payload length not supported without enabling 802.15.4g mode
164#define GPIO2_IOCFG CC1200_IOCFG_RXFIFO_THR
166#if MAC_CONF_WITH_TSCH
168#define FIFO_THRESHOLD 1
170#define FIFO_THRESHOLD 0
173#define FIFO_THRESHOLD 32
176#define RXOFF_MODE_RX 1
178#define APPEND_STATUS 1
181#define GPIO2_IOCFG CC1200_IOCFG_MARC_2PIN_STATUS_0
182#if (CC1200_MAX_PAYLOAD_LEN <= (CC1200_FIFO_SIZE - PHR_LEN - APPENDIX_LEN))
187#define RXOFF_MODE_RX 1
189#define APPEND_STATUS 1
195#define RXOFF_MODE_RX 0
197#define APPEND_STATUS 0
202#define GPIO0_IOCFG CC1200_IOCFG_PKT_SYNC_RXTX
204#define GPIO3_IOCFG CC1200_IOCFG_MARC_2PIN_STATUS_0
206#define TXOFF_MODE_RX 1
209#define CC_APPENDIX_LEN 2
212#define CC_APPENDIX_LEN 0
218extern const cc1200_rf_cfg_t CC1200_RF_CFG;
223#define XTAL_FREQ_KHZ 40000
230#if (XTAL_FREQ_KHZ == 40000) && (LO_DIVIDER == 4)
231#define FREQ_DIVIDER 625
232#define FREQ_MULTIPLIER 4096
234#error Invalid settings for frequency calculation
237#if STATE_USES_MARC_STATE
239#define STATE_IDLE CC1200_MARC_STATE_IDLE
240#define STATE_RX CC1200_MARC_STATE_RX
241#define STATE_TX CC1200_MARC_STATE_TX
242#define STATE_RX_FIFO_ERROR CC1200_MARC_STATE_RX_FIFO_ERR
243#define STATE_TX_FIFO_ERROR CC1200_MARC_STATE_TX_FIFO_ERR
246#define STATE_IDLE CC1200_STATUS_BYTE_IDLE
247#define STATE_RX CC1200_STATUS_BYTE_RX
248#define STATE_TX CC1200_STATUS_BYTE_TX
249#define STATE_FSTXON CC1200_STATUS_BYTE_FSTXON
250#define STATE_CALIBRATE CC1200_STATUS_BYTE_CALIBRATE
251#define STATE_SETTLING CC1200_STATUS_BYTE_SETTLING
252#define STATE_RX_FIFO_ERR CC1200_STATUS_BYTE_RX_FIFO_ERR
253#define STATE_TX_FIFO_ERR CC1200_STATUS_BYTE_TX_FIFO_ERR
259#define INVALID_FRAME 0
261#define ADDR_CHECK_FAILED 1
263#define ADDR_CHECK_OK 2
265#define ADDR_CHECK_OK_ACK_SEND 3
270#define CHANNEL_UPDATE_SUCCEEDED 0
272#define CHANNEL_UPDATE_POSTPONED 1
274#define CHANNEL_OUT_OF_LIMITS 2
279#define RF_INITIALIZED 0x01
283#define RF_RX_PROCESSING_PKT 0x04
285#define RF_TX_ACTIVE 0x08
287#define RF_UPDATE_CHANNEL 0x10
289#define RF_POLL_RX_INTERRUPT 0x20
291#define RF_RX_ONGOING 0x40
294#if CC1200_CAL_TIMEOUT_SECONDS
295#define RF_FORCE_CALIBRATION 0x40
305#define TX_LEDS_ON() leds_on(CC1200_TX_LEDS)
306#define TX_LEDS_OFF() leds_off(CC1200_TX_LEDS)
313#define RX_LEDS_ON() leds_on(CC1200_RX_LEDS)
314#define RX_LEDS_OFF() leds_off(CC1200_RX_LEDS)
325#define LOCK_SPI() do { spi_locked++; } while(0)
326#define SPI_IS_LOCKED() (spi_locked != 0)
327#define RELEASE_SPI() do { spi_locked--; } while(0)
332#define SETUP_GPIO_INTERRUPTS() \
334 cc1200_arch_gpio0_setup_irq(0); \
335 cc1200_arch_gpio2_setup_irq(1); \
337#define ENABLE_GPIO_INTERRUPTS() \
339 cc1200_arch_gpio0_enable_irq(); \
340 cc1200_arch_gpio2_enable_irq(); \
342#define DISABLE_GPIO_INTERRUPTS() \
344 cc1200_arch_gpio0_disable_irq(); \
345 cc1200_arch_gpio2_disable_irq(); \
348#define SETUP_GPIO_INTERRUPTS() cc1200_arch_gpio0_setup_irq(0)
349#define ENABLE_GPIO_INTERRUPTS() cc1200_arch_gpio0_enable_irq()
350#define DISABLE_GPIO_INTERRUPTS() cc1200_arch_gpio0_disable_irq()
357#define ERROR(...) printf(__VA_ARGS__)
364#define RF_ASSERT(condition) \
367 printf("RF: Assertion failed in line %d\n", __LINE__); \
371#define RF_ASSERT(condition)
376#define WARNING(...) printf(__VA_ARGS__)
383#define INFO(...) printf(__VA_ARGS__)
389#define RTIMER_BUSYWAIT_UNTIL_STATE(s, t) RTIMER_BUSYWAIT_UNTIL(state() == (s), t)
395static volatile uint8_t spi_locked = 0;
396#if CC1200_WITH_TX_BUF
398static uint8_t tx_pkt[CC1200_MAX_PAYLOAD_LEN];
401static uint16_t tx_pkt_len;
403uint16_t bytes_left_to_write;
405static uint8_t rx_pkt[CC1200_MAX_PAYLOAD_LEN + APPENDIX_LEN];
407static volatile uint16_t rx_pkt_len = 0;
412static uint8_t rf_channel;
414static uint8_t new_rf_channel;
420static int8_t txpower;
421static int8_t new_txpower;
423static int8_t cca_threshold;
424static int8_t new_cca_threshold;
426static uint8_t rf_flags = 0;
427#if !CC1200_AUTOCAL && CC1200_CAL_TIMEOUT_SECONDS
429static unsigned long cal_timer;
431#if CC1200_USE_RX_WATCHDOG
443copy_header_to_tx_fifo(
unsigned short payload_len);
446prepare(
const void *payload,
unsigned short payload_len);
449transmit(
unsigned short payload_len);
452send(
const void *payload,
unsigned short payload_len);
455read(
void *buf,
unsigned short bufsize);
464receiving_packet(
void);
482get_object(radio_param_t param,
void *dest,
size_t size);
485set_object(radio_param_t param,
const void *src,
size_t size);
512strobe(uint8_t strobe);
518single_write(uint16_t
addr, uint8_t
value);
521single_read(uint16_t
addr);
524burst_write(uint16_t
addr,
const uint8_t *data, uint8_t data_len);
527burst_read(uint16_t
addr, uint8_t *data, uint8_t data_len);
530write_reg_settings(
const registerSetting_t *reg_settings,
531 uint16_t sizeof_reg_settings);
548idle_calibrate_rx(
void);
554idle_tx_rx(
const uint8_t *payload, uint16_t payload_len);
557update_txpower(int8_t txpower_dbm);
560update_cca_threshold(int8_t threshold_dbm);
563calculate_freq(uint8_t channel);
569addr_check_auto_ack(uint8_t *frame, uint16_t frame_len);
572static void pollhandler(
void);
574PROCESS(cc1200_process,
"CC1200 driver");
583#if CC1200_USE_RX_WATCHDOG
586 if((rf_flags & (RF_ON | RF_TX_ACTIVE)) == RF_ON) {
600 if(cc1200_arch_gpio0_read_pin() == 0) {
610 if(state() != STATE_RX) {
611 WARNING(
"RF: RX watchdog triggered!\n");
636 if((rf_flags & (RF_ON + RF_POLL_RX_INTERRUPT)) ==
637 (RF_ON + RF_POLL_RX_INTERRUPT)) {
638 cc1200_rx_interrupt();
641 if(rf_flags & RF_UPDATE_CHANNEL) {
661 NETSTACK_MAC.input();
680 INFO(
"RF: Init (%s)\n", CC1200_RF_CFG.cfg_descriptor);
682 if(!(rf_flags & RF_INITIALIZED)) {
690 SETUP_GPIO_INTERRUPTS();
702 new_txpower = CC1200_RF_CFG.max_txpower;
703 update_txpower(new_txpower);
706 new_cca_threshold = CC1200_RF_CFG.cca_threshold;
707 update_cca_threshold(new_cca_threshold);
712 rf_flags |= (RF_INITIALIZED + RF_ON);
732prepare(
const void *payload,
unsigned short payload_len)
735 INFO(
"RF: Prepare (%d)\n", payload_len);
737 if((payload_len < ACK_LEN) ||
738 (payload_len > CC1200_MAX_PAYLOAD_LEN)) {
739 ERROR(
"RF: Invalid payload length!\n");
743 tx_pkt_len = payload_len;
745#if CC1200_WITH_TX_BUF
747 memcpy(tx_pkt, payload, tx_pkt_len);
749#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
750#error CC1200 max payload too large
753 copy_header_to_tx_fifo(payload_len);
754 burst_write(CC1200_TXFIFO, payload, payload_len);
763copy_header_to_tx_fifo(
unsigned short payload_len)
771#if CC1200_802154G_CRC16
777 phr.phrb = (uint8_t)(payload_len & 0x00FF);
778 phr.phra = (uint8_t)((payload_len >> 8) & 0x0007);
779#if CC1200_802154G_WHITENING
781 phr.phra |= (1 << 3);
783#if CC1200_802154G_CRC16
785 phr.phra |= (1 << 4);
791 rf_flags &= ~RF_RX_PROCESSING_PKT;
798 burst_write(CC1200_TXFIFO, (uint8_t *)&phr, PHR_LEN);
801 burst_write(CC1200_TXFIFO, (uint8_t *)&payload_len, PHR_LEN);
809transmit(
unsigned short transmit_len)
816 INFO(
"RF: Transmit (%d)\n", transmit_len);
818 if(transmit_len != tx_pkt_len) {
819 ERROR(
"RF: TX length mismatch!\n");
824 rf_flags |= RF_TX_ACTIVE;
826 if(!(rf_flags & RF_ON)) {
835 if(!channel_clear()) {
840 rf_flags &= ~RF_TX_ACTIVE;
858 if(new_txpower != txpower) {
859 update_txpower(new_txpower);
870#if CC1200_WITH_TX_BUF
871 txret = idle_tx_rx(tx_pkt, tx_pkt_len);
873 txret = idle_tx_rx(NULL, tx_pkt_len);
883 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_RX,
884 CC1200_RF_CFG.tx_rx_turnaround);
886 ENABLE_GPIO_INTERRUPTS();
898#ifdef RF_FORCE_CALIBRATION
899 rf_flags |= RF_FORCE_CALIBRATION;
913 rf_flags &= ~RF_TX_ACTIVE;
921send(
const void *payload,
unsigned short payload_len)
926 INFO(
"RF: Send (%d)\n", payload_len);
939read(
void *buf,
unsigned short buf_len)
947 rssi = (int8_t)rx_pkt[rx_pkt_len - 2];
949 uint8_t crc_lqi = rx_pkt[rx_pkt_len - 1];
951 len = rx_pkt_len - APPENDIX_LEN;
955 ERROR(
"RF: Failed to read packet (too big)!\n");
959 INFO(
"RF: Read (%d bytes, %d dBm)\n", len, rssi);
961 memcpy((
void *)buf, (
const void *)rx_pkt, len);
966 packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
968 packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY,
969 crc_lqi & ~(1 << 7));
986 uint8_t cca, was_off = 0;
988 if(SPI_IS_LOCKED()) {
993 if(!(rf_flags & RF_ON)) {
1001 RF_ASSERT(state() == STATE_RX);
1010 if(cc1200_arch_gpio0_read_pin() == 1) {
1012 INFO(
"RF: CCA (0)\n");
1019 if(new_cca_threshold != cca_threshold) {
1020 update_cca_threshold(new_cca_threshold);
1025 & CC1200_CARRIER_SENSE_VALID),
1027 RF_ASSERT(rssi0 & CC1200_CARRIER_SENSE_VALID);
1029 if(rssi0 & CC1200_CARRIER_SENSE) {
1031 INFO(
"RF: CCA (0)\n");
1035 INFO(
"RF: CCA (1)\n");
1059receiving_packet(
void)
1064 if((rf_flags & (RF_ON | RF_TX_ACTIVE)) == RF_ON) {
1066 if((cc1200_arch_gpio0_read_pin() == 1) || (rx_pkt_len != 0)) {
1086 INFO(
"RF: Receiving (%d)\n", ret);
1103 static rtimer_clock_t last_spi_poll;
1106 ret = ((rx_pkt_len != 0) ? 1 : 0);
1110 if(ret == 0 && !SPI_IS_LOCKED()) {
1112 if(!RTIMER_CLOCK_LT(now, last_spi_poll
1113 + US_TO_RTIMERTICKS(CC1200_PENDING_POLL_THROTTLE_US))) {
1114 last_spi_poll = now;
1116 ret = (single_read(CC1200_NUM_RXBYTES) > 0);
1121 INFO(
"RF: Pending (%d)\n", ret);
1134 if(!(rf_flags & RF_ON)) {
1136 if(SPI_IS_LOCKED()) {
1143 cc1200_arch_spi_select();
1146 RF_ASSERT((cc1200_arch_gpio0_read_pin() == 0));
1147 cc1200_arch_spi_deselect();
1149 rf_flags = RF_INITIALIZED;
1153 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
1156 idle_calibrate_rx();
1160#if CC1200_USE_RX_WATCHDOG
1167 INFO(
"RF: Already on\n");
1182 if(rf_flags & RF_ON) {
1184 if(SPI_IS_LOCKED()) {
1190 if(single_read(CC1200_NUM_RXBYTES) > 0) {
1193 cc1200_rx_interrupt();
1194 if(SPI_IS_LOCKED()) {
1206 single_write(CC1200_IOCFG0, CC1200_IOCFG_RXFIFO_CHIP_RDY_N);
1209 strobe(CC1200_SPWD);
1212 rf_flags = RF_INITIALIZED;
1216#if CC1200_USE_RX_WATCHDOG
1221 INFO(
"RF: Already off\n");
1238 int16_t rssi0, rssi1;
1239 uint8_t was_off = 0;
1242 if(!(rf_flags & RF_ON)) {
1249 & CC1200_CARRIER_SENSE_VALID),
1251 RF_ASSERT(rssi0 & CC1200_CARRIER_SENSE_VALID);
1253 rssi1 = (int8_t)single_read(CC1200_RSSI1);
1275 if(rf_flags & RF_ON) {
1346#if CC1200_802154G_CRC16
1372 case RADIO_CONST_MAX_PAYLOAD_LEN:
1427 rx_mode_value =
value;
1432 tx_mode_value =
value;
1446 new_txpower = (int8_t)
value;
1460 new_cca_threshold = (int8_t)
value;
1476get_object(radio_param_t param,
void *dest,
size_t size)
1479 if(size !=
sizeof(rtimer_clock_t) || !dest) {
1482 *(rtimer_clock_t *)dest = sfd_timestamp;
1486#if MAC_CONF_WITH_TSCH
1487 if(param == RADIO_CONST_TSCH_TIMING) {
1488 if(size !=
sizeof(uint16_t *) || !dest) {
1492 *(
const uint16_t **)dest = CC1200_RF_CFG.tsch_timing;
1503set_object(radio_param_t param,
const void *src,
size_t size)
1519strobe(uint8_t strobe)
1524 cc1200_arch_spi_select();
1525 ret = cc1200_arch_spi_rw_byte(strobe);
1526 cc1200_arch_spi_deselect();
1537 cc1200_arch_spi_select();
1538 cc1200_arch_spi_rw_byte(CC1200_SRES);
1544 cc1200_arch_spi_deselect();
1550single_write(uint16_t
addr, uint8_t val)
1555 cc1200_arch_spi_select();
1556 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1557 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_WRITE_CMD);
1558 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1560 cc1200_arch_spi_rw_byte(
addr | CC1200_WRITE_BIT);
1562 ret = cc1200_arch_spi_rw_byte(val);
1563 cc1200_arch_spi_deselect();
1571single_read(uint16_t
addr)
1576 cc1200_arch_spi_select();
1577 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1578 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_READ_CMD);
1579 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1581 cc1200_arch_spi_rw_byte(
addr | CC1200_READ_BIT);
1583 ret = cc1200_arch_spi_rw_byte(0);
1584 cc1200_arch_spi_deselect();
1592burst_write(uint16_t
addr,
const uint8_t *data, uint8_t data_len)
1595 cc1200_arch_spi_select();
1596 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1597 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_BURST_WRITE_CMD);
1598 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1600 cc1200_arch_spi_rw_byte(
addr | CC1200_WRITE_BIT | CC1200_BURST_BIT);
1602 cc1200_arch_spi_rw(NULL, data, data_len);
1603 cc1200_arch_spi_deselect();
1609burst_read(uint16_t
addr, uint8_t *data, uint8_t data_len)
1612 cc1200_arch_spi_select();
1613 if(CC1200_IS_EXTENDED_ADDR(
addr)) {
1614 cc1200_arch_spi_rw_byte(CC1200_EXTENDED_BURST_READ_CMD);
1615 cc1200_arch_spi_rw_byte((uint8_t)
addr);
1617 cc1200_arch_spi_rw_byte(
addr | CC1200_READ_BIT | CC1200_BURST_BIT);
1619 cc1200_arch_spi_rw(data, NULL, data_len);
1620 cc1200_arch_spi_deselect();
1626write_reg_settings(
const registerSetting_t *reg_settings,
1627 uint16_t sizeof_reg_settings)
1630 int i = sizeof_reg_settings /
sizeof(registerSetting_t);
1632 if(reg_settings != NULL) {
1634 single_write(reg_settings->addr,
1648#if CC1200_RF_TESTMODE
1659 write_reg_settings(CC1200_RF_CFG.register_settings,
1660 CC1200_RF_CFG.size_of_register_settings);
1663#if CC1200_FREQ_OFFSET
1665 single_write(CC1200_FREQOFF1, (uint8_t)(CC1200_FREQ_OFFSET >> 8));
1667 single_write(CC1200_FREQOFF0, (uint8_t)(CC1200_FREQ_OFFSET));
1671 single_write(CC1200_AGC_GAIN_ADJUST, (int8_t)CC1200_RF_CFG.rssi_offset);
1677#if (CC1200_RF_TESTMODE == 1) || (CC1200_RF_TESTMODE == 2)
1679 strobe(CC1200_SFTX);
1680 single_write(CC1200_TXFIRST, 0);
1681 single_write(CC1200_TXLAST, 0xFF);
1682 update_txpower(CC1200_CONST_TX_POWER_MAX);
1683 single_write(CC1200_PKT_CFG2, 0x02);
1684 freq = calculate_freq(CC1200_DEFAULT_CHANNEL - CC1200_RF_CFG.min_channel);
1685 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
1686 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
1687 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
1689 printf(
"RF: Freq0 0x%02x\n", ((uint8_t *)&freq)[0]);
1690 printf(
"RF: Freq1 0x%02x\n", ((uint8_t *)&freq)[1]);
1691 printf(
"RF: Freq2 0x%02x\n", ((uint8_t *)&freq)[2]);
1693#if (CC1200_RF_TESTMODE == 1)
1694 single_write(CC1200_SYNC_CFG1, 0xE8);
1695 single_write(CC1200_PREAMBLE_CFG1, 0x00);
1696 single_write(CC1200_MDMCFG1, 0x46);
1697 single_write(CC1200_PKT_CFG0, 0x40);
1698 single_write(CC1200_FS_DIG1, 0x07);
1699 single_write(CC1200_FS_DIG0, 0xAA);
1700 single_write(CC1200_FS_DVC1, 0xFF);
1701 single_write(CC1200_FS_DVC0, 0x17);
1704#if (CC1200_RF_TESTMODE == 2)
1705 single_write(CC1200_SYNC_CFG1, 0xE8);
1706 single_write(CC1200_PREAMBLE_CFG1, 0x00);
1707 single_write(CC1200_MDMCFG1, 0x06);
1708 single_write(CC1200_PA_CFG1, 0x3F);
1709 single_write(CC1200_MDMCFG2, 0x03);
1710 single_write(CC1200_FS_DIG1, 0x07);
1711 single_write(CC1200_FS_DIG0, 0xAA);
1712 single_write(CC1200_FS_DVC0, 0x17);
1713 single_write(CC1200_SERIAL_STATUS, 0x08);
1719#if (CC1200_RF_TESTMODE == 1)
1722 leds_off(LEDS_YELLOW);
1727 leds_on(LEDS_YELLOW);
1731 leds_off(LEDS_GREEN);
1736 leds_on(LEDS_GREEN);
1740#elif (CC1200_RF_TESTMODE == 3)
1743 single_write(CC1200_IOCFG3, CC1200_IOCFG_CARRIER_SENSE);
1744 single_write(CC1200_IOCFG2, CC1200_IOCFG_SERIAL_CLK);
1745 single_write(CC1200_IOCFG0, CC1200_IOCFG_SERIAL_RX);
1746 update_cca_threshold(CC1200_RF_CFG.cca_threshold);
1747 freq = calculate_freq(CC1200_DEFAULT_CHANNEL - CC1200_RF_CFG.min_channel);
1748 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
1749 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
1750 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
1757 leds_off(LEDS_GREEN);
1758 leds_on(LEDS_YELLOW);
1761 leds_off(LEDS_YELLOW);
1762 leds_on(LEDS_GREEN);
1766 if(cc1200_arch_gpio3_read_pin() == 1) {
1781 single_write(CC1200_IOCFG3, GPIO3_IOCFG);
1782 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
1783 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
1785 reg = single_read(CC1200_SETTLING_CFG);
1798 single_write(CC1200_SETTLING_CFG, reg);
1801 reg = single_read(CC1200_RFEND_CFG1);
1807 single_write(CC1200_RFEND_CFG1, reg);
1810 reg = single_read(CC1200_RFEND_CFG0);
1815 single_write(CC1200_RFEND_CFG0, reg);
1823 single_write(CC1200_PKT_CFG2, (1 << 5));
1825 single_write(CC1200_PKT_CFG2, 0x00);
1829 reg = single_read(CC1200_PKT_CFG1);
1835 single_write(CC1200_PKT_CFG1, reg);
1838 reg = single_read(CC1200_PKT_CFG0);
1841 single_write(CC1200_PKT_CFG0, reg);
1843#ifdef FIFO_THRESHOLD
1845 single_write(CC1200_FIFO_CFG, FIFO_THRESHOLD);
1855#if STATE_USES_MARC_STATE
1856 return single_read(CC1200_MARCSTATE) & 0x1f;
1858 return strobe(CC1200_SNOP) & 0x70;
1869#ifdef RF_FORCE_CALIBRATION
1870 if (!(rf_flags & RF_FORCE_CALIBRATION)
1871 && ((
clock_seconds() - cal_timer) < CC1200_CAL_TIMEOUT_SECONDS)) {
1875 rf_flags &= ~RF_FORCE_CALIBRATION;
1878 INFO(
"RF: Calibrate\n");
1880 strobe(CC1200_SCAL);
1881 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_CALIBRATE,
RTIMER_SECOND / 100);
1882 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
RTIMER_SECOND / 100);
1884#if CC1200_CAL_TIMEOUT_SECONDS
1898 DISABLE_GPIO_INTERRUPTS();
1903 ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
1904 ENERGEST_OFF(ENERGEST_TYPE_TRANSMIT);
1908 if(s == STATE_IDLE) {
1910 }
else if(s == STATE_RX_FIFO_ERR) {
1911 WARNING(
"RF: RX FIFO error!\n");
1912 strobe(CC1200_SFRX);
1913 }
else if(s == STATE_TX_FIFO_ERR) {
1914 WARNING(
"RF: TX FIFO error!\n");
1915 strobe(CC1200_SFTX);
1918 strobe(CC1200_SIDLE);
1919 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
RTIMER_SECOND / 100);
1925idle_calibrate_rx(
void)
1928 RF_ASSERT(state() == STATE_IDLE);
1934 rf_flags &= ~RF_RX_PROCESSING_PKT;
1935 strobe(CC1200_SFRX);
1939 ENABLE_GPIO_INTERRUPTS();
1941 ENERGEST_ON(ENERGEST_TYPE_LISTEN);
1950 uint8_t s = state();
1952 if(s == STATE_IDLE) {
1954 }
else if(s == STATE_RX_FIFO_ERR) {
1955 WARNING(
"RF: RX FIFO error!\n");
1956 strobe(CC1200_SFRX);
1957 }
else if(s == STATE_TX_FIFO_ERR) {
1958 WARNING(
"RF: TX FIFO error!\n");
1959 strobe(CC1200_SFTX);
1961 strobe(CC1200_SIDLE);
1962 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_IDLE,
1967 rf_flags &= ~RF_RX_PROCESSING_PKT;
1970 ENABLE_GPIO_INTERRUPTS();
1972 strobe(CC1200_SFRX);
1980idle_tx_rx(
const uint8_t *payload, uint16_t payload_len)
1982#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
1988 rf_flags &= ~RF_RX_PROCESSING_PKT;
1989 strobe(CC1200_SFRX);
1992 single_write(CC1200_IOCFG0, CC1200_IOCFG_MARC_2PIN_STATUS_0);
1994#if CC1200_WITH_TX_BUF
1996 copy_header_to_tx_fifo(payload_len);
2021 strobe(CC1200_SFSTXON);
2024#if CC1200_WITH_TX_BUF
2032#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2033 to_write = MIN(payload_len, (CC1200_FIFO_SIZE - PHR_LEN));
2034 burst_write(CC1200_TXFIFO, payload, to_write);
2035 bytes_left_to_write = payload_len - to_write;
2036 p = payload + to_write;
2038 burst_write(CC1200_TXFIFO, payload, payload_len);
2044 RTIMER_BUSYWAIT_UNTIL_STATE(STATE_FSTXON,
RTIMER_SECOND / 100);
2057 ENERGEST_ON(ENERGEST_TYPE_TRANSMIT);
2059 if((cc1200_arch_gpio0_read_pin() == 0) &&
2060 (single_read(CC1200_NUM_TXBYTES) != 0)) {
2067 ERROR(
"RF: TX doesn't start!\n");
2068#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2069 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2074 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2080#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN)) && CC1200_WITH_TX_BUF
2081 if(bytes_left_to_write != 0) {
2086 if((bytes_left_to_write != 0) &&
2087 (cc1200_arch_gpio2_read_pin() == 0)) {
2089 to_write = MIN(bytes_left_to_write, FIFO_THRESHOLD);
2090 burst_write(CC1200_TXFIFO, p, to_write);
2091 bytes_left_to_write -= to_write;
2093 t0 += CC1200_RF_CFG.tx_pkt_lifetime;
2095 }
while((cc1200_arch_gpio0_read_pin() == 1) &&
2096 RTIMER_CLOCK_LT(
RTIMER_NOW(), t0 + CC1200_RF_CFG.tx_pkt_lifetime));
2106 if((s != STATE_RX) && (s != STATE_SETTLING)) {
2113 INFO(
"RF: TX failure!\n");
2116 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2120 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2129 CC1200_RF_CFG.tx_pkt_lifetime);
2134 CC1200_RF_CFG.tx_pkt_lifetime);
2137 if(cc1200_arch_gpio0_read_pin() == 1) {
2139 ERROR(
"RF: TX takes to long!\n");
2140#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2142 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2147 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2153#if (CC1200_MAX_PAYLOAD_LEN > (CC1200_FIFO_SIZE - PHR_LEN))
2155 single_write(CC1200_IOCFG2, GPIO2_IOCFG);
2159 single_write(CC1200_IOCFG0, GPIO0_IOCFG);
2163 ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
2171update_txpower(int8_t txpower_dbm)
2174 uint8_t reg = single_read(CC1200_PA_CFG1);
2178 reg |= ((((txpower_dbm + 18) * 2) - 1) & 0x3F);
2179 single_write(CC1200_PA_CFG1, reg);
2181 txpower = txpower_dbm;
2187update_cca_threshold(int8_t threshold_dbm)
2190 single_write(CC1200_AGC_CS_THR, (uint8_t)threshold_dbm);
2191 cca_threshold = threshold_dbm;
2197calculate_freq(uint8_t channel)
2202 freq = CC1200_RF_CFG.chan_center_freq0 + (channel * CC1200_RF_CFG.chan_spacing) / 1000 ;
2203 freq *= FREQ_MULTIPLIER;
2204 freq /= FREQ_DIVIDER;
2215 uint8_t was_off = 0;
2218 channel %= (CC1200_RF_CFG.max_channel - CC1200_RF_CFG.min_channel + 1);
2219 channel += CC1200_RF_CFG.min_channel;
2226 if(channel == rf_channel) {
2231 if(channel < CC1200_RF_CFG.min_channel ||
2232 channel > CC1200_RF_CFG.max_channel) {
2234 return CHANNEL_OUT_OF_LIMITS;
2237 if(SPI_IS_LOCKED() || (rf_flags & RF_TX_ACTIVE) || receiving_packet()) {
2241 new_rf_channel = channel;
2242 rf_flags |= RF_UPDATE_CHANNEL;
2244 INFO(
"RF: Channel update postponed\n");
2246 return CHANNEL_UPDATE_POSTPONED;
2249 rf_flags &= ~RF_UPDATE_CHANNEL;
2251 INFO(
"RF: Channel update (%d)\n", channel);
2253 if(!(rf_flags & RF_ON)) {
2262 freq = calculate_freq(channel - CC1200_RF_CFG.min_channel);
2263 single_write(CC1200_FREQ0, ((uint8_t *)&freq)[0]);
2264 single_write(CC1200_FREQ1, ((uint8_t *)&freq)[1]);
2265 single_write(CC1200_FREQ2, ((uint8_t *)&freq)[2]);
2267 rf_channel = channel;
2271#ifdef RF_FORCE_CALIBRATION
2272 rf_flags |= RF_FORCE_CALIBRATION;
2274 idle_calibrate_rx();
2283 return CHANNEL_UPDATE_SUCCEEDED;
2289is_broadcast_addr(uint8_t mode, uint8_t *
addr)
2292 int i = mode == FRAME802154_SHORTADDRMODE ? 2 : 8;
2295 if(
addr[i] != 0xff) {
2305addr_check_auto_ack(uint8_t *frame, uint16_t frame_len)
2341 uint8_t ack[ACK_LEN] = { FRAME802154_ACKFRAME, 0, info154.
seq };
2343#if (RXOFF_MODE_RX == 1)
2351 prepare((
const uint8_t *)ack, ACK_LEN);
2352 idle_tx_rx((
const uint8_t *)ack, ACK_LEN);
2356 return ADDR_CHECK_OK_ACK_SEND;
2360 return ADDR_CHECK_OK;
2364 return ADDR_CHECK_FAILED;
2370 return INVALID_FRAME;
2379cc1200_rx_interrupt(
void)
2385 uint8_t num_rxbytes;
2387 static uint16_t payload_len;
2392 static uint16_t bytes_read;
2398 static uint8_t buf[CC1200_MAX_PAYLOAD_LEN + APPENDIX_LEN];
2406 int gpio2 = cc1200_arch_gpio2_read_pin();
2407 int gpio0 = cc1200_arch_gpio0_read_pin();
2408 if((rf_flags & RF_RX_ONGOING) == 0 && gpio2 > 0) {
2409 rf_flags |= RF_RX_ONGOING;
2413 rf_flags &= ~RF_RX_ONGOING;
2417 if(SPI_IS_LOCKED()) {
2425 rf_flags |= RF_POLL_RX_INTERRUPT;
2430 rf_flags &= ~RF_POLL_RX_INTERRUPT;
2442 if((s == STATE_RX_FIFO_ERR) || (s == STATE_TX_FIFO_ERR)) {
2450 num_rxbytes = single_read(CC1200_NUM_RXBYTES);
2452 if(num_rxbytes == 0) {
2460 INFO(
"RF: RX FIFO empty!\n");
2466 if(!(rf_flags & RF_RX_PROCESSING_PKT)) {
2475 if(num_rxbytes < PHR_LEN) {
2477 WARNING(
"RF: PHR incomplete!\n");
2484 burst_read(CC1200_RXFIFO,
2487 payload_len = (phr.phra & 0x07);
2489 payload_len += phr.phrb;
2491 if(phr.phra & (1 << 4)) {
2500 burst_read(CC1200_RXFIFO,
2501 (uint8_t *)&payload_len,
2505 if(payload_len < ACK_LEN) {
2507 WARNING(
"RF: Packet too short!\n");
2513 if(payload_len > CC1200_MAX_PAYLOAD_LEN) {
2515 WARNING(
"RF: Packet to long!\n");
2523 num_rxbytes -= PHR_LEN;
2525 rf_flags |= RF_RX_PROCESSING_PKT;
2531 if(rf_flags & RF_RX_PROCESSING_PKT) {
2538 if((num_rxbytes + bytes_read) > (payload_len + CC_APPENDIX_LEN)) {
2546 WARNING(
"RF: RX length mismatch %d %d %d!\n", num_rxbytes,
2555 burst_read(CC1200_RXFIFO,
2559 bytes_read += num_rxbytes;
2562 if(bytes_read == (payload_len + CC_APPENDIX_LEN)) {
2571 uint8_t crc_lqi = buf[bytes_read - 1];
2573 int8_t rssi = single_read(CC1200_RSSI1);
2574 uint8_t crc_lqi = single_read(CC1200_LQI_VAL);
2577 if(!(crc_lqi & (1 << 7))) {
2579 INFO(
"RF: CRC error!\n");
2580 }
else if(rx_pkt_len != 0) {
2582 WARNING(
"RF: Packet pending!\n");
2585 int ret = addr_check_auto_ack(buf, bytes_read);
2587 if((ret == ADDR_CHECK_OK) ||
2588 (ret == ADDR_CHECK_OK_ACK_SEND)) {
2592 buf[bytes_read++] = (uint8_t)rssi;
2593 buf[bytes_read++] = crc_lqi;
2595 rx_pkt_len = bytes_read;
2596 memcpy((
void *)rx_pkt, buf, rx_pkt_len);
Header file for the energy estimation mechanism.
802.15.4 frame creation and parsing functions
unsigned long clock_seconds(void)
Get the current value of the platform seconds.
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
void clock_delay(unsigned int i)
Obsolete delay function but we implement it here since some code still uses it.
static int read(void *buf, unsigned short bufsize)
static radio_value_t get_rssi(void)
Reads the current signal strength (RSSI).
static int transmit(unsigned short transmit_len)
static radio_result_t get_object(radio_param_t param, void *dest, size_t size)
static int prepare(const void *payload, unsigned short payload_len)
static void set_channel(uint8_t channel)
Set the current operating channel.
static radio_result_t set_object(radio_param_t param, const void *src, size_t size)
static int value(int type)
void watchdog_periodic(void)
Writes the WDT clear sequence.
#define CLOCK_SECOND
A second, measured in system clock time.
void etimer_reset(struct etimer *et)
Reset an event timer with the same interval as was previously set.
void etimer_stop(struct etimer *et)
Stop a pending event timer.
static bool etimer_expired(struct etimer *et)
Check if an event timer has expired.
void etimer_set(struct etimer *et, clock_time_t interval)
Set an event timer.
int frame802154_parse(uint8_t *data, int len, frame802154_t *pf)
Parses an input frame.
linkaddr_t linkaddr_node_addr
The link-layer address of the node.
bool linkaddr_cmp(const linkaddr_t *addr1, const linkaddr_t *addr2)
Compare two link-layer addresses.
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
void packetbuf_clear(void)
Clear and reset the packetbuf.
#define PROCESS(name, strname)
Declare a process.
#define PROCESS_POLLHANDLER(handler)
Specify an action when a process is polled.
#define PROCESS_BEGIN()
Define the beginning of a process.
#define PROCESS_WAIT_EVENT_UNTIL(c)
Wait for an event to be posted to the process, with an extra condition.
#define PROCESS_END()
Define the end of a process.
void process_start(struct process *p, process_data_t data)
Start a process.
#define PROCESS_CONTEXT_BEGIN(p)
Switch context to another process.
#define PROCESS_THREAD(name, ev, data)
Define the body of a process.
#define PROCESS_YIELD()
Yield the currently running process.
#define PROCESS_CONTEXT_END(p)
End a context switch.
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
void process_poll(struct process *p)
Request a process to be polled.
#define RADIO_RX_MODE_ADDRESS_FILTER
Enable address-based frame filtering.
#define RADIO_RX_MODE_POLL_MODE
Enable/disable/get the state of radio driver poll mode operation.
#define RADIO_TX_MODE_SEND_ON_CCA
Radio TX mode control / retrieval.
enum radio_result_e radio_result_t
Radio return values when setting or getting radio parameters.
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio.
#define RADIO_RX_MODE_AUTOACK
Enable automatic transmission of ACK frames.
@ RADIO_RESULT_NOT_SUPPORTED
The parameter is not supported.
@ RADIO_RESULT_INVALID_VALUE
The value argument was incorrect.
@ RADIO_RESULT_OK
The parameter was set/read successfully.
@ RADIO_PARAM_POWER_MODE
When getting the value of this parameter, the radio driver should indicate whether the radio is on or...
@ RADIO_CONST_PHY_OVERHEAD
The physical layer header (PHR) + MAC layer footer (MFR) overhead in bytes.
@ RADIO_PARAM_RSSI
Received signal strength indicator in dBm.
@ RADIO_PARAM_LAST_PACKET_TIMESTAMP
Last packet timestamp, of type rtimer_clock_t.
@ RADIO_PARAM_LAST_RSSI
The RSSI value of the last received packet.
@ RADIO_CONST_BYTE_AIR_TIME
The air time of one byte in usec, e.g.
@ RADIO_PARAM_RX_MODE
Radio receiver mode determines if the radio has address filter (RADIO_RX_MODE_ADDRESS_FILTER) and aut...
@ RADIO_PARAM_CHANNEL
Channel used for radio communication.
@ RADIO_CONST_DELAY_BEFORE_RX
The delay in usec between turning on the radio and it being actually listening (able to hear a preamb...
@ RADIO_PARAM_TXPOWER
Transmission power in dBm.
@ RADIO_PARAM_64BIT_ADDR
Long (64 bits) address for the radio, which is used by the address filter.
@ RADIO_CONST_DELAY_BEFORE_TX
The delay in usec between a call to the radio API's transmit function and the end of SFD transmission...
@ RADIO_CONST_CHANNEL_MAX
The highest radio channel number.
@ RADIO_PARAM_PAN_ID
The personal area network identifier (PAN ID), which is used by the h/w frame filtering functionality...
@ RADIO_PARAM_CCA_THRESHOLD
Clear channel assessment threshold in dBm.
@ RADIO_CONST_TXPOWER_MIN
The minimum transmission power in dBm.
@ RADIO_CONST_CHANNEL_MIN
The lowest radio channel number.
@ RADIO_CONST_TXPOWER_MAX
The maximum transmission power in dBm.
@ RADIO_CONST_DELAY_BEFORE_DETECT
The delay in usec between the end of SFD reception for an incoming frame and the radio API starting t...
@ RADIO_PARAM_16BIT_ADDR
The short address (16 bits) for the radio, which is used by the h/w filter.
@ RADIO_PARAM_TX_MODE
Radio transmission mode determines if the radio has send on CCA (RADIO_TX_MODE_SEND_ON_CCA) enabled o...
@ RADIO_POWER_MODE_OFF
Radio powered off and in the lowest possible power consumption state.
@ RADIO_POWER_MODE_ON
Radio powered on and able to receive frames.
@ RADIO_TX_COLLISION
TX failed due to a collision.
@ RADIO_TX_ERR
An error occurred during transmission.
@ RADIO_TX_OK
TX was successful and where an ACK was requested one was received.
#define RTIMER_BUSYWAIT_UNTIL(cond, max_time)
Busy-wait until a condition for at most max_time.
#define RTIMER_SECOND
Number of rtimer ticks for 1 second.
#define RTIMER_BUSYWAIT(duration)
Busy-wait for a fixed duration.
#define RTIMER_NOW()
Get the current clock time.
Header file for the LED HAL.
Include file for the Contiki low-layer network stack (NETSTACK).
Header file for the Packet buffer (packetbuf) management.
uint8_t ack_required
1 bit.
uint8_t dest_addr_mode
2 bit.
Parameters used by the frame802154_create() function.
uint8_t seq
Sequence number.
uint8_t dest_addr[8]
Destination address.
frame802154_fcf_t fcf
Frame control field.
The structure of a Contiki-NG radio device driver.
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.