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at86rf215-arch.c
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1/*
2 * Copyright (c) 2023, ComLab, Jozef Stefan Institute - https://e6.ijs.si/
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the copyright holder nor the names of its
14 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
20 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
21 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
28 * OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30/*---------------------------------------------------------------------------*/
31/**
32 * \file
33 * AT86RF215 OpenMoteB arch specific code
34 *
35 * \author
36 * Grega Morano <grega.morano@ijs.si>
37 */
38/*---------------------------------------------------------------------------*/
39#include "contiki.h"
40#include "contiki-net.h"
41#include "dev/spi-arch-legacy.h"
42#include "dev/spi-legacy.h"
43#include "dev/ioc.h"
44#include "dev/gpio.h"
45#include "dev/gpio-hal.h"
46/*---------------------------------------------------------------------------*/
47#define AT86RF215_SPI_CSN_PORT_BASE GPIO_PORT_TO_BASE(AT86RF215_SPI_CSN_PORT)
48#define AT86RF215_SPI_CSN_PIN_MASK GPIO_PIN_MASK(AT86RF215_SPI_CSN_PIN)
49#define AT86RF215_RSTN_PORT_BASE GPIO_PORT_TO_BASE(AT86RF215_RSTN_PORT)
50#define AT86RF215_RSTN_PIN_MASK GPIO_PIN_MASK(AT86RF215_RSTN_PIN)
51#define AT86RF215_PWR_PORT_BASE GPIO_PORT_TO_BASE(AT86RF215_PWR_PORT)
52#define AT86RF215_PWR_PIN_MASK GPIO_PIN_MASK(AT86RF215_PWR_PIN)
53#define AT86RF215_IRQ_PORT_BASE GPIO_PORT_TO_BASE(AT86RF215_IRQ_PORT)
54#define AT86RF215_IRQ_PIN_MASK GPIO_PIN_MASK(AT86RF215_IRQ_PIN)
55/*---------------------------------------------------------------------------*/
56extern void at86rf215_isr(void);
57/*---------------------------------------------------------------------------*/
58static void
59at86rf215_interrupt_handler(gpio_hal_pin_mask_t pin_mask)
60{
61 at86rf215_isr();
62}
63/*---------------------------------------------------------------------------*/
64static gpio_hal_event_handler_t irq_handler = {
65 .next = NULL,
66 .handler = at86rf215_interrupt_handler,
67 .pin_mask = gpio_hal_pin_to_mask(AT86RF215_IRQ_PIN) << (AT86RF215_IRQ_PORT << 3),
68};
69/*---------------------------------------------------------------------------*/
70void
71at86rf215_arch_enable_EXTI(void)
72{
73 GPIO_ENABLE_INTERRUPT(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
74 NVIC_EnableIRQ(AT86RF215_GPIOx_VECTOR);
75}
76/*---------------------------------------------------------------------------*/
77void
78at86rf215_arch_disable_EXTI(void)
79{
80 GPIO_DISABLE_INTERRUPT(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
81}
82/*---------------------------------------------------------------------------*/
83void
84at86rf215_arch_set_RSTN(void)
85{
86 GPIO_CLR_PIN(AT86RF215_RSTN_PORT_BASE, AT86RF215_RSTN_PIN_MASK);
87}
88/*---------------------------------------------------------------------------*/
89void
90at86rf215_arch_clear_RSTN(void)
91{
92 GPIO_SET_PIN(AT86RF215_RSTN_PORT_BASE, AT86RF215_RSTN_PIN_MASK);
93}
94/*---------------------------------------------------------------------------*/
95void
96at86rf215_arch_spi_select(void)
97{
98 GPIO_CLR_PIN(AT86RF215_SPI_CSN_PORT_BASE, AT86RF215_SPI_CSN_PIN_MASK);
99}
100/*---------------------------------------------------------------------------*/
101void
102at86rf215_arch_spi_deselect(void)
103{
104 GPIO_SET_PIN(AT86RF215_SPI_CSN_PORT_BASE, AT86RF215_SPI_CSN_PIN_MASK);
105}
106/*---------------------------------------------------------------------------*/
107uint8_t
108at86rf215_arch_spi_txrx(uint8_t b)
109{
110 SPIX_WAITFORTxREADY(AT86RF215_SPI_INSTANCE);
111 SPIX_BUF(AT86RF215_SPI_INSTANCE) = b;
112 SPIX_WAITFOREOTx(AT86RF215_SPI_INSTANCE);
113 SPIX_WAITFOREORx(AT86RF215_SPI_INSTANCE);
114 return SPIX_BUF(AT86RF215_SPI_INSTANCE);;
115}
116/*---------------------------------------------------------------------------*/
117void
118at86rf215_arch_init(void)
119{
120 /* Initialize power pin */
121 GPIO_SOFTWARE_CONTROL(AT86RF215_PWR_PORT_BASE , AT86RF215_PWR_PIN_MASK );
122 GPIO_SET_OUTPUT(AT86RF215_PWR_PORT_BASE , AT86RF215_PWR_PIN_MASK );
123
124 /* Initialize reset pin */
125 GPIO_SOFTWARE_CONTROL(AT86RF215_RSTN_PORT_BASE ,AT86RF215_RSTN_PIN_MASK );
126 GPIO_SET_OUTPUT(AT86RF215_RSTN_PORT_BASE ,AT86RF215_RSTN_PIN_MASK );
127
128 /* Turn the radio off */
129 GPIO_CLR_PIN(AT86RF215_PWR_PORT_BASE , AT86RF215_PWR_PIN_MASK );
130 GPIO_CLR_PIN(AT86RF215_RSTN_PORT_BASE ,AT86RF215_RSTN_PIN_MASK );
131
132 /* Power up the radio */
133 GPIO_SET_PIN(AT86RF215_PWR_PORT_BASE , AT86RF215_PWR_PIN_MASK );
134
135 /* "Un-reset" the radio */
136 at86rf215_arch_clear_RSTN();
137
138 /* Initialize SPI */
139 spix_init(AT86RF215_SPI_INSTANCE);
140 spix_cs_init(AT86RF215_SPI_CSN_PORT, AT86RF215_SPI_CSN_PIN);
141 spix_set_mode(AT86RF215_SPI_INSTANCE, SSI_CR0_FRF_MOTOROLA, 0, 0, 8);
142
143 /* AT86RF215 supports SPI clock up to 25MHz, but CC2538 supports max 16MHz
144 * by using 32MHz CPU clock (defined in board.h) */
145 spix_set_clock_freq(AT86RF215_SPI_INSTANCE, 16000000);
146
147 /* Disable SPI interrupts - to reduce the time needed for read/write execution */
148 NVIC_DisableIRQ(SSI0_IRQn);
149 REG(SSI0_BASE + SSI_IM) = 0x0F;
150
151 /* Initialize IRQs */
152 GPIO_SOFTWARE_CONTROL(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
153 GPIO_SET_INPUT(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
154 ioc_set_over(AT86RF215_IRQ_PORT, AT86RF215_IRQ_PIN, IOC_OVERRIDE_PUE);
155
156 GPIO_DETECT_EDGE(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
157 GPIO_TRIGGER_SINGLE_EDGE(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
158 GPIO_DETECT_FALLING(AT86RF215_IRQ_PORT_BASE, AT86RF215_IRQ_PIN_MASK);
159
160 /* Set radio priority higher than rtimer - so isr can execute durring tx/rx routine */
161 NVIC_SetPriority(SMT_IRQn, 1);
162 NVIC_SetPriority(GPT1A_IRQn, 1);
163 NVIC_SetPriority(AT86RF215_GPIOx_VECTOR, 0);
164
165 gpio_hal_register_handler(&irq_handler);
166}
at86rf215_arch_clear_RSTN
void at86rf215_arch_clear_RSTN(void)
Release the radio from the reset mode.
Definition at86rf215-arch.c:90
at86rf215_arch_enable_EXTI
void at86rf215_arch_enable_EXTI(void)
Enable the radio's IRQ line.
Definition at86rf215-arch.c:71
at86rf215_arch_spi_select
void at86rf215_arch_spi_select(void)
Select the radio's SPI chip select.
Definition at86rf215-arch.c:96
at86rf215_isr
void at86rf215_isr(void)
Interrupt service routine for the AT86RF215.
Definition at86rf215.c:811
at86rf215_arch_disable_EXTI
void at86rf215_arch_disable_EXTI(void)
Disable the radio's IRQ line.
Definition at86rf215-arch.c:78
at86rf215_arch_init
void at86rf215_arch_init(void)
Initialize the radio's I/O periphery.
Definition at86rf215-arch.c:118
at86rf215_arch_spi_txrx
uint8_t at86rf215_arch_spi_txrx(uint8_t b)
Transfer and receive a single byte over SPI.
Definition at86rf215-arch.c:108
at86rf215_arch_set_RSTN
void at86rf215_arch_set_RSTN(void)
Reset the radio.
Definition at86rf215-arch.c:84
at86rf215_arch_spi_deselect
void at86rf215_arch_spi_deselect(void)
Deselect the radio's SPI chip select.
Definition at86rf215-arch.c:102
gpio-hal.h
Header file for the GPIO HAL.
gpio.h
Header file with register and macro declarations for the cc2538 GPIO module.
SSI0_IRQn
@ SSI0_IRQn
SSI0 Interrupt.
Definition cc2538_cm3.h:84
SMT_IRQn
@ SMT_IRQn
SM Timer Interrupt.
Definition cc2538_cm3.h:113
GPT1A_IRQn
@ GPT1A_IRQn
GPTimer 1A Interrupt.
Definition cc2538_cm3.h:90
GPIO_DETECT_FALLING
#define GPIO_DETECT_FALLING(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to trigger an interrupt on falling edge.
Definition gpio.h:193
GPIO_SOFTWARE_CONTROL
#define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK)
Configure the pin to be software controlled with PIN_MASK of port with PORT_BASE.
Definition gpio.h:258
GPIO_DISABLE_INTERRUPT
#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK)
Disable interrupt triggering for pins with PIN_MASK of port with PORT_BASE.
Definition gpio.h:209
GPIO_SET_INPUT
#define GPIO_SET_INPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to input.
Definition gpio.h:78
GPIO_DETECT_EDGE
#define GPIO_DETECT_EDGE(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to detect edge.
Definition gpio.h:154
GPIO_SET_PIN
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE high.
Definition gpio.h:106
GPIO_CLR_PIN
#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE low.
Definition gpio.h:113
GPIO_TRIGGER_SINGLE_EDGE
#define GPIO_TRIGGER_SINGLE_EDGE(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to trigger an interrupt on single edge (controlled by G...
Definition gpio.h:177
GPIO_SET_OUTPUT
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to output.
Definition gpio.h:85
GPIO_ENABLE_INTERRUPT
#define GPIO_ENABLE_INTERRUPT(PORT_BASE, PIN_MASK)
Enable interrupt triggering for pins with PIN_MASK of port with PORT_BASE.
Definition gpio.h:201
ioc_set_over
void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over)
Set Port:Pin override function.
Definition ioc.c:54
IOC_OVERRIDE_PUE
#define IOC_OVERRIDE_PUE
Pull Up Enable.
Definition ioc.h:223
spix_set_mode
void spix_set_mode(uint8_t spi, uint32_t frame_format, uint32_t clock_polarity, uint32_t clock_phase, uint32_t data_size)
Configure the SPI data and clock polarity and the data size for the instance given.
Definition spi-legacy.c:295
SSI_CR0_FRF_MOTOROLA
#define SSI_CR0_FRF_MOTOROLA
Motorola frame format.
Definition ssi.h:156
spix_init
void spix_init(uint8_t spi)
Initialize the SPI bus for the instance given.
Definition spi-legacy.c:213
SSI_IM
#define SSI_IM
Interrupt mask.
Definition ssi.h:72
spix_cs_init
void spix_cs_init(uint8_t port, uint8_t pin)
Configure a GPIO to be the chip select pin.
Definition spi-legacy.c:354
SSI0_BASE
#define SSI0_BASE
Base address for SSI0.
Definition ssi.h:58
spix_set_clock_freq
void spix_set_clock_freq(uint8_t spi, uint32_t freq)
Sets the SPI clock frequency of the given SSI instance.
Definition spi-legacy.c:323
gpio_hal_register_handler
void gpio_hal_register_handler(gpio_hal_event_handler_t *handler)
Register a function to be called whenever a pin triggers an event.
Definition gpio-hal.c:55
gpio_hal_pin_mask_t
uint32_t gpio_hal_pin_mask_t
GPIO pin mask representation.
Definition gpio-hal.h:142
gpio_hal_pin_to_mask
#define gpio_hal_pin_to_mask(pin)
Convert a pin to a pin mask.
Definition gpio-hal.h:255
ioc.h
Header file with declarations for the I/O Control module.
spi-arch-legacy.h
Header file for the cc2538 SPI driver, including macros for the implementation of the low-level SPI p...
spi-legacy.h
Basic SPI macros.
gpio_hal_event_handler_s
Datatype for GPIO event handlers.
Definition gpio-hal.h:180