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nrfx_glue.h
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1 /*
2  * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
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30  */
31 
32 #ifndef NRFX_GLUE_H__
33 #define NRFX_GLUE_H__
34 
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38 
39 /**
40  * \addtogroup nrf
41  * @{
42  *
43  * \file
44  * Header with nrfx stub defines
45  * \author
46  * Yago Fontoura do Rosario <yago.rosario@hotmail.com.br>
47  */
48 
49 #include <soc/nrfx_irqs.h>
50 #include <soc/nrfx_atomic.h>
51 #include <soc/nrfx_coredep.h>
52 
53 /*------------------------------------------------------------------------------ */
54 
55 /**
56  * @brief Macro for placing a runtime assertion.
57  *
58  * @param expression Expression to evaluate.
59  */
60 #define NRFX_ASSERT(expression)
61 
62 /**
63  * @brief Macro for placing a compile time assertion.
64  *
65  * @param expression Expression to evaluate.
66  */
67 #define NRFX_STATIC_ASSERT(expression)
68 
69 /*------------------------------------------------------------------------------ */
70 
71 /**
72  * @brief Macro for setting the priority of a specific IRQ.
73  *
74  * @param irq_number IRQ number.
75  * @param priority Priority to be set.
76  */
77 #define NRFX_IRQ_PRIORITY_SET(irq_number, priority) \
78  _NRFX_IRQ_PRIORITY_SET(irq_number, priority)
79 static inline void
80 _NRFX_IRQ_PRIORITY_SET(IRQn_Type irq_number,
81  uint8_t priority)
82 {
83  NVIC_SetPriority(irq_number, priority);
84 }
85 /**
86  * @brief Macro for enabling a specific IRQ.
87  *
88  * @param irq_number IRQ number.
89  */
90 #define NRFX_IRQ_ENABLE(irq_number) _NRFX_IRQ_ENABLE(irq_number)
91 static inline void
92 _NRFX_IRQ_ENABLE(IRQn_Type irq_number)
93 {
94  NVIC_EnableIRQ(irq_number);
95 }
96 /**
97  * @brief Macro for checking if a specific IRQ is enabled.
98  *
99  * @param irq_number IRQ number.
100  *
101  * @retval true If the IRQ is enabled.
102  * @retval false Otherwise.
103  */
104 #define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number)
105 static inline bool
106 _NRFX_IRQ_IS_ENABLED(IRQn_Type irq_number)
107 {
108  return 0 != (NVIC->ISER[irq_number / 32] & (1UL << (irq_number % 32)));
109 }
110 /**
111  * @brief Macro for disabling a specific IRQ.
112  *
113  * @param irq_number IRQ number.
114  */
115 #define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number)
116 static inline void
117 _NRFX_IRQ_DISABLE(IRQn_Type irq_number)
118 {
119  NVIC_DisableIRQ(irq_number);
120 }
121 /**
122  * @brief Macro for clearing the pending status of a specific IRQ.
123  *
124  * @param irq_number IRQ number.
125  */
126 #define NRFX_IRQ_PENDING_CLEAR(irq_number) _NVIC_ClearPendingIRQ(irq_number)
127 static inline void
128 _NVIC_ClearPendingIRQ(IRQn_Type irq_number)
129 {
130  NVIC_ClearPendingIRQ(irq_number);
131 }
132 /**
133  * @brief Macro for entering into a critical section.
134  */
135 #define NRFX_CRITICAL_SECTION_ENTER() __disable_irq()
136 
137 /**
138  * @brief Macro for exiting from a critical section.
139  */
140 #define NRFX_CRITICAL_SECTION_EXIT() __enable_irq()
141 
142 /*------------------------------------------------------------------------------ */
143 
144 #define NRFX_DELAY_US(us_time) nrfx_coredep_delay_us(us_time)
145 
146 /*------------------------------------------------------------------------------ */
147 
148 /** @brief Atomic 32-bit unsigned type. */
149 #define nrfx_atomic_t uint32_t
150 
151 /**
152  * @brief Macro for running a bitwise AND operation on an atomic object
153  * and returning its previous value.
154  *
155  * @param[in] p_data Atomic memory pointer.
156  * @param[in] value Value of the second operand in the AND operation.
157  *
158  * @return Previous value of the atomic object.
159  */
160 #define NRFX_ATOMIC_FETCH_AND(p_data, value) nrfx_atomic_u32_fetch_and(p_data, value)
161 
162 /*------------------------------------------------------------------------------ */
163 
164 /** @} */
165 
166 #ifdef __cplusplus
167 }
168 #endif
169 
170 #endif // NRFX_GLUE_H__
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