Contiki-NG
jn516x-def.h
1 /*
2  * Copyright (c) 2015, SICS Swedish ICT.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the Institute nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * This file is part of the Contiki operating system.
30  *
31  */
32 
33 #ifndef JN516X_DEF_H_
34 #define JN516X_DEF_H_
35 
36 #include <inttypes.h>
37 #include <jendefs.h>
38 
39 #undef putchar
40 
41 /* 1 len byte, 2 bytes CRC */
42 #define RADIO_PHY_OVERHEAD 3
43 /* 250kbps data rate. One byte = 32us */
44 #define RADIO_BYTE_AIR_TIME 32
45 /* Delay between GO signal and SFD
46  * Measured 153us between GO and preamble. Add 5 bytes (preamble + SFD) air time: 153+5*32 = 313 */
47 #define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(313))
48 /* Delay between GO signal and start listening
49  * Measured 104us: between GO signal and start listening */
50 #define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(104))
51 /* Delay between the SFD finishes arriving and it is detected in software */
52 #define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(14))
53 
54 /* uIP endinanness */
55 #define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN
56 
57 /* Micromac configuration */
58 
59 #ifndef MIRCOMAC_CONF_BUF_NUM
60 #define MIRCOMAC_CONF_BUF_NUM 2
61 #endif
62 
63 /* 32kHz or 16MHz rtimers? */
64 #ifdef RTIMER_CONF_USE_32KHZ
65 #define RTIMER_USE_32KHZ RTIMER_CONF_USE_32KHZ
66 #else
67 #define RTIMER_USE_32KHZ 0
68 #endif
69 
70 /* Put the device in a sleep mode in idle periods?
71  * If RTIMER_USE_32KHZ is set, the device runs all the time on the 32 kHz oscillator.
72  * If RTIMER_USE_32KHZ is not set, the device runs on the 32 kHz oscillator during sleep,
73  * and switches back to the 32 MHz oscillator (16 MHz rtimer) at wakeup.
74  * */
75 #ifdef JN516X_SLEEP_CONF_ENABLED
76 #define JN516X_SLEEP_ENABLED JN516X_SLEEP_CONF_ENABLED
77 #else
78 #define JN516X_SLEEP_ENABLED 0
79 #endif
80 
81 /* Enable this to get the 32.768kHz oscillator */
82 #ifndef JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
83 #define JN516X_EXTERNAL_CRYSTAL_OSCILLATOR (RTIMER_USE_32KHZ || JN516X_SLEEP_ENABLED)
84 #endif /* JN516X_EXTERNAL_CRYSTAL_OSCILLATOR */
85 
86 /* 8ms timer tick */
87 #define CLOCK_CONF_SECOND 125
88 
89 #if JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
90 #define JN516X_XOSC_SECOND 32768
91 #else
92 #define JN516X_XOSC_SECOND 32000
93 #endif
94 
95 /* Timer conversion*/
96 #if RTIMER_USE_32KHZ
97 #define RADIO_TO_RTIMER(X) ((X) * (JN516X_XOSC_SECOND) / 62500)
98 #else
99  /* RTIMER 16M = 256 * 62500(RADIO) == 2^8 * 62500 */
100 #define RADIO_TO_RTIMER(X) ((rtimer_clock_t)((X) << (int32_t)8L))
101 #endif
102 
103 /* If the timer base a binary 32kHz clock, compensate for this base drift */
104 #if RTIMER_USE_32KHZ && JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
105 /* The drift compared to "true" 10ms slots.
106  * Enable adaptive sync to enable compensation for this.
107  * Slot length 10000 usec
108  * 328 ticks
109  * Tick duration 30.517578125 usec
110  * Real slot duration 10009.765625 usec
111  * Target - real duration = -9.765625 usec
112  * TSCH_CONF_BASE_DRIFT_PPM -977
113  */
114 #define TSCH_CONF_BASE_DRIFT_PPM -977
115 #endif
116 
117 #define DR_11744_DIO2 12
118 #define DR_11744_DIO3 13
119 #define DR_11744_DIO4 14
120 #define DR_11744_DIO5 15
121 #define DR_11744_DIO6 16
122 #define DR_11744_DIO7 17
123 
124 /* Enable power amplifier of JN5168 M05 and M06 modules */
125 #if defined(JN5168_M05) || defined(JN5168_M06)
126 #define RADIO_TEST_MODE RADIO_TEST_MODE_HIGH_PWR
127 #else
128 #define RADIO_TEST_MODE RADIO_TEST_MODE_DISABLED
129 #endif
130 
131 #define TSCH_DEBUG 0
132 
133 #if TSCH_DEBUG
134 #define TSCH_DEBUG_INIT() do { \
135  vAHI_DioSetDirection(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); \
136  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); } while(0);
137 #define TSCH_DEBUG_INTERRUPT() do { \
138  static dio_state = 0; \
139  dio_state = !dio_state; \
140  if(dio_state) { \
141  vAHI_DioSetOutput((1 << DR_11744_DIO2), 0); \
142  } else { \
143  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2)); \
144  } \
145 } while(0);
146 #define TSCH_DEBUG_RX_EVENT() do { \
147  static dio_state = 0; \
148  dio_state = !dio_state; \
149  if(dio_state) { \
150  vAHI_DioSetOutput((1 << DR_11744_DIO4), 0); \
151  } else { \
152  vAHI_DioSetOutput(0, (1 << DR_11744_DIO4)); \
153  } \
154 } while(0);
155 #define TSCH_DEBUG_TX_EVENT() do { \
156  static dio_state = 0; \
157  dio_state = !dio_state; \
158  if(dio_state) { \
159  vAHI_DioSetOutput((1 << DR_11744_DIO5), 0); \
160  } else { \
161  vAHI_DioSetOutput(0, (1 << DR_11744_DIO5)); \
162  } \
163 } while(0);
164 #define TSCH_DEBUG_SLOT_START() do { \
165  static dio_state = 0; \
166  dio_state = !dio_state; \
167  if(dio_state) { \
168  vAHI_DioSetOutput((1 << DR_11744_DIO3), 0); \
169  } else { \
170  vAHI_DioSetOutput(0, (1 << DR_11744_DIO3)); \
171  } \
172 } while(0);
173 #define TSCH_DEBUG_SLOT_END()
174 #endif /* TSCH_DEBUG */
175 
176 /* UART baud rates */
177 #define UART_RATE_4800 0
178 #define UART_RATE_9600 1
179 #define UART_RATE_19200 2
180 #define UART_RATE_38400 3
181 #define UART_RATE_76800 4
182 #define UART_RATE_115200 5
183 #define UART_RATE_230400 6
184 #define UART_RATE_460800 7
185 #define UART_RATE_500000 8
186 #define UART_RATE_576000 9
187 #define UART_RATE_921600 10
188 #define UART_RATE_1000000 11
189 
190 #define PLATFORM_HAS_LEDS 1
191 #define PLATFORM_HAS_BUTTON (SENSOR_BOARD_DR1174 == 1)
192 #define PLATFORM_HAS_LIGHT (SENSOR_BOARD_DR1175 == 1)
193 #define PLATFORM_HAS_HT (SENSOR_BOARD_DR1175 == 1)
194 #define PLATFORM_HAS_POT (SENSOR_BOARD_DR1199 == 1)
195 #define PLATFORM_HAS_BATTERY 0 /* sensor driver not implemented */
196 #define PLATFORM_HAS_SHT11 0
197 #define PLATFORM_HAS_RADIO 1
198 
199 #define LEDS_CONF_LEGACY_API 1
200 
201 #define PLATFORM_CONF_PROVIDES_MAIN_LOOP 1
202 
203 /* CPU target speed in Hz
204  * RTIMER and peripherals clock is F_CPU/2 */
205 #define F_CPU 32000000UL
206 
207 /* LED ports */
208 /*
209  #define LEDS_PxDIR P5DIR
210  #define LEDS_PxOUT P5OUT
211  #define LEDS_CONF_RED 0x10
212  #define LEDS_CONF_GREEN 0x20
213  #define LEDS_CONF_YELLOW 0x40
214  #define JENNIC_CONF_BUTTON_PIN (IRQ_DIO9|IRQ_DIO10)
215  */
216 
217 #define CC_CONF_REGISTER_ARGS 1
218 #define CC_CONF_FUNCTION_POINTER_ARGS 1
219 #define CC_CONF_VA_ARGS 1
220 #define CC_CONF_INLINE inline
221 
222 #ifdef HAVE_STDINT_H
223 #include <stdint.h>
224 #else
225 #ifndef uint8_t
226 typedef unsigned char uint8_t;
227 typedef unsigned short uint16_t;
228 typedef unsigned long uint32_t;
229 typedef signed char int8_t;
230 typedef short int16_t;
231 typedef long int32_t;
232 typedef unsigned long long uint64_t;
233 typedef long long int64_t;
234 #endif
235 #endif /* !HAVE_STDINT_H */
236 
237 /* Types for clocks and uip_stats */
238 typedef uint16_t uip_stats_t;
239 typedef uint32_t clock_time_t;
240 
241 /* Shall we calibrate the DCO periodically? */
242 #ifndef DCOSYNCH_CONF_ENABLED
243 #define DCOSYNCH_CONF_ENABLED (!(MAC_CONF_WITH_TSCH))
244 #endif /* DCOSYNCH_CONF_ENABLED */
245 
246 /* How often shall we attempt to calibrate DCO?
247  * PS: It should be calibrated upon temperature changes,
248  * but the naive approach of periodic calibration is fine too */
249 #ifndef DCOSYNCH_PERIOD
250 #define DCOSYNCH_PERIOD (5 * 60)
251 #endif /* VCO_CALIBRATION_INTERVAL */
252 
253 /* Disable UART HW flow control */
254 #ifndef UART_HW_FLOW_CTRL
255 #define UART_HW_FLOW_CTRL 0
256 #endif /* UART_HW_FLOW_CTRL */
257 
258 /* Disable UART SW flow control */
259 #ifndef UART_XONXOFF_FLOW_CTRL
260 #define UART_XONXOFF_FLOW_CTRL 1
261 #endif /* UART_XONXOFF_FLOW_CTRL */
262 
263 #ifndef UART_BAUD_RATE
264 #define UART_BAUD_RATE UART_RATE_1000000
265 #endif /* UART_BAUD_RATE */
266 
267 #ifndef UART1_BAUD_RATE
268 #define UART1_BAUD_RATE UART_RATE_1000000
269 #endif
270 #define ENABLE_ADVANCED_BAUD_SELECTION (UART_BAUD_RATE > UART_RATE_115200)
271 
272 /* Extension of LED definitions from leds.h for various JN516x dev boards
273 JN516x Dongle:
274  LEDS_RED Red LED on dongle
275  LEDS_GREEN Green LED on dongle
276  Note: Only one LED can be switch on at the same time
277 
278 DR1174-only:
279  LEDS_GP0 LED D3 on DR1174
280  LEDS_GP1 LED D6 on DR1174
281 
282 DR1174+DR1199:
283  LEDS_RED LED D1 on DR1199
284  LEDS_GREEN LED D2 on DR1199
285  LEDS_BLUE LED D3 on DR1199
286  LEDS_GP0 LED D3 on DR1174
287  LEDS_GP1 LED D6 on DR1174
288 
289 DR1174+DR1175:
290  LEDS_RED Red led in RGB-led with level control on DR1175
291  LEDS_GREEN Green led in RGB-led with level control on DR1175
292  LEDS_BLUE Blue led in RGB-led with level control on DR1175
293  LEDS_WHITE White power led with level control on DR1175
294  LEDS_GP0 LEDS D3 on DR1174
295  LEDS_GP1 LEDS D6 on DR1174
296 */
297 #define LEDS_WHITE 8
298 #define LEDS_GP0 16
299 #define LEDS_GP1 32
300 #define LEDS_GP2 64
301 #define LEDS_GP3 128
302 #define LEDS_CONF_ALL 255
303 
304 #endif /* JN516X_DEF_H_ */