45 #ifndef __CC1352R1_LAUNCHXL_BOARD_H__ 46 #define __CC1352R1_LAUNCHXL_BOARD_H__ 52 #include "contiki-conf.h" 55 #include <ti/drivers/PIN.h> 56 #include <ti/devices/DeviceFamily.h> 57 #include DeviceFamily_constructPath(driverlib/ioc.h) 60 extern const PIN_Config BoardGpioInitTable[];
63 #define CC1352R1_LAUNCHXL 73 #define CC1352R1_LAUNCHXL_DIO23_ANALOG IOID_23 74 #define CC1352R1_LAUNCHXL_DIO24_ANALOG IOID_24 75 #define CC1352R1_LAUNCHXL_DIO25_ANALOG IOID_25 76 #define CC1352R1_LAUNCHXL_DIO26_ANALOG IOID_26 77 #define CC1352R1_LAUNCHXL_DIO27_ANALOG IOID_27 78 #define CC1352R1_LAUNCHXL_DIO28_ANALOG IOID_28 79 #define CC1352R1_LAUNCHXL_DIO29_ANALOG IOID_29 82 #define CC1352R1_LAUNCHXL_DIO12 IOID_12 83 #define CC1352R1_LAUNCHXL_DIO15 IOID_15 84 #define CC1352R1_LAUNCHXL_DIO16_TDO IOID_16 85 #define CC1352R1_LAUNCHXL_DIO17_TDI IOID_17 86 #define CC1352R1_LAUNCHXL_DIO21 IOID_21 87 #define CC1352R1_LAUNCHXL_DIO22 IOID_22 88 #define CC1352R1_LAUNCHXL_DIO30 IOID_30 91 #define CC1352R1_LAUNCHXL_PIN_BTN1 IOID_15 92 #define CC1352R1_LAUNCHXL_PIN_BTN2 IOID_14 95 #define CC1352R1_LAUNCHXL_GPIO_LED_ON 1 96 #define CC1352R1_LAUNCHXL_GPIO_LED_OFF 0 99 #define CC1352R1_LAUNCHXL_I2C0_SCL0 IOID_4 100 #define CC1352R1_LAUNCHXL_I2C0_SDA0 IOID_5 103 #define CC1352R1_LAUNCHXL_I2S_ADO IOID_25 104 #define CC1352R1_LAUNCHXL_I2S_ADI IOID_26 105 #define CC1352R1_LAUNCHXL_I2S_BCLK IOID_27 106 #define CC1352R1_LAUNCHXL_I2S_MCLK PIN_UNASSIGNED 107 #define CC1352R1_LAUNCHXL_I2S_WCLK IOID_28 110 #define CC1352R1_LAUNCHXL_PIN_LED_ON 1 111 #define CC1352R1_LAUNCHXL_PIN_LED_OFF 0 112 #define CC1352R1_LAUNCHXL_PIN_RLED IOID_6 113 #define CC1352R1_LAUNCHXL_PIN_GLED IOID_7 116 #define CC1352R1_LAUNCHXL_PWMPIN0 CC1352R1_LAUNCHXL_PIN_RLED 117 #define CC1352R1_LAUNCHXL_PWMPIN1 CC1352R1_LAUNCHXL_PIN_GLED 118 #define CC1352R1_LAUNCHXL_PWMPIN2 PIN_UNASSIGNED 119 #define CC1352R1_LAUNCHXL_PWMPIN3 PIN_UNASSIGNED 120 #define CC1352R1_LAUNCHXL_PWMPIN4 PIN_UNASSIGNED 121 #define CC1352R1_LAUNCHXL_PWMPIN5 PIN_UNASSIGNED 122 #define CC1352R1_LAUNCHXL_PWMPIN6 PIN_UNASSIGNED 123 #define CC1352R1_LAUNCHXL_PWMPIN7 PIN_UNASSIGNED 126 #define CC1352R1_LAUNCHXL_SPI_FLASH_CS IOID_20 127 #define CC1352R1_LAUNCHXL_FLASH_CS_ON 0 128 #define CC1352R1_LAUNCHXL_FLASH_CS_OFF 1 131 #define CC1352R1_LAUNCHXL_SPI0_MISO IOID_8 132 #define CC1352R1_LAUNCHXL_SPI0_MOSI IOID_9 133 #define CC1352R1_LAUNCHXL_SPI0_CLK IOID_10 134 #define CC1352R1_LAUNCHXL_SPI0_CSN IOID_11 135 #define CC1352R1_LAUNCHXL_SPI1_MISO PIN_UNASSIGNED 136 #define CC1352R1_LAUNCHXL_SPI1_MOSI PIN_UNASSIGNED 137 #define CC1352R1_LAUNCHXL_SPI1_CLK PIN_UNASSIGNED 138 #define CC1352R1_LAUNCHXL_SPI1_CSN PIN_UNASSIGNED 141 #define CC1352R1_LAUNCHXL_UART0_RX IOID_12 142 #define CC1352R1_LAUNCHXL_UART0_TX IOID_13 143 #define CC1352R1_LAUNCHXL_UART0_CTS IOID_19 144 #define CC1352R1_LAUNCHXL_UART0_RTS IOID_18 145 #define CC1352R1_LAUNCHXL_UART1_RX PIN_UNASSIGNED 146 #define CC1352R1_LAUNCHXL_UART1_TX PIN_UNASSIGNED 147 #define CC1352R1_LAUNCHXL_UART1_CTS PIN_UNASSIGNED 148 #define CC1352R1_LAUNCHXL_UART1_RTS PIN_UNASSIGNED 150 #define CC1352R1_LAUNCHXL_UART_RX CC1352R1_LAUNCHXL_UART0_RX 151 #define CC1352R1_LAUNCHXL_UART_TX CC1352R1_LAUNCHXL_UART0_TX 152 #define CC1352R1_LAUNCHXL_UART_CTS CC1352R1_LAUNCHXL_UART0_CTS 153 #define CC1352R1_LAUNCHXL_UART_RTS CC1352R1_LAUNCHXL_UART0_RTS 182 typedef enum CC1352R1_LAUNCHXL_ADCBufName {
183 CC1352R1_LAUNCHXL_ADCBUF0 = 0,
185 CC1352R1_LAUNCHXL_ADCBUFCOUNT
186 } CC1352R1_LAUNCHXL_ADCBufName;
192 typedef enum CC1352R1_LAUNCHXL_ADCBuf0ChannelName {
193 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL0 = 0,
194 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL1,
195 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL2,
196 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL3,
197 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL4,
198 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL5,
199 CC1352R1_LAUNCHXL_ADCBUF0CHANNEL6,
200 CC1352R1_LAUNCHXL_ADCBUF0CHANNELVDDS,
201 CC1352R1_LAUNCHXL_ADCBUF0CHANNELDCOUPL,
202 CC1352R1_LAUNCHXL_ADCBUF0CHANNELVSS,
204 CC1352R1_LAUNCHXL_ADCBUF0CHANNELCOUNT
205 } CC1352R1_LAUNCHXL_ADCBuf0ChannelName;
211 typedef enum CC1352R1_LAUNCHXL_ADCName {
212 CC1352R1_LAUNCHXL_ADC0 = 0,
213 CC1352R1_LAUNCHXL_ADC1,
214 CC1352R1_LAUNCHXL_ADC2,
215 CC1352R1_LAUNCHXL_ADC3,
216 CC1352R1_LAUNCHXL_ADC4,
217 CC1352R1_LAUNCHXL_ADC5,
218 CC1352R1_LAUNCHXL_ADC6,
219 CC1352R1_LAUNCHXL_ADCDCOUPL,
220 CC1352R1_LAUNCHXL_ADCVSS,
221 CC1352R1_LAUNCHXL_ADCVDDS,
223 CC1352R1_LAUNCHXL_ADCCOUNT
224 } CC1352R1_LAUNCHXL_ADCName;
230 typedef enum CC1352R1_LAUNCHXL_ECDHName {
231 CC1352R1_LAUNCHXL_ECDH0 = 0,
233 CC1352R1_LAUNCHXL_ECDHCOUNT
234 } CC1352R1_LAUNCHXL_ECDHName;
240 typedef enum CC1352R1_LAUNCHXL_ECDSAName {
241 CC1352R1_LAUNCHXL_ECDSA0 = 0,
243 CC1352R1_LAUNCHXL_ECDSACOUNT
244 } CC1352R1_LAUNCHXL_ECDSAName;
250 typedef enum CC1352R1_LAUNCHXL_ECJPAKEName {
251 CC1352R1_LAUNCHXL_ECJPAKE0 = 0,
253 CC1352R1_LAUNCHXL_ECJPAKECOUNT
254 } CC1352R1_LAUNCHXL_ECJPAKEName;
260 typedef enum CC1352R1_LAUNCHXL_AESCCMName {
261 CC1352R1_LAUNCHXL_AESCCM0 = 0,
263 CC1352R1_LAUNCHXL_AESCCMCOUNT
264 } CC1352R1_LAUNCHXL_AESCCMName;
270 typedef enum CC1352R1_LAUNCHXL_AESGCMName {
271 CC1352R1_LAUNCHXL_AESGCM0 = 0,
273 CC1352R1_LAUNCHXL_AESGCMCOUNT
274 } CC1352R1_LAUNCHXL_AESGCMName;
280 typedef enum CC1352R1_LAUNCHXL_AESCBCName {
281 CC1352R1_LAUNCHXL_AESCBC0 = 0,
283 CC1352R1_LAUNCHXL_AESCBCCOUNT
284 } CC1352R1_LAUNCHXL_AESCBCName;
290 typedef enum CC1352R1_LAUNCHXL_AESCTRName {
291 CC1352R1_LAUNCHXL_AESCTR0 = 0,
293 CC1352R1_LAUNCHXL_AESCTRCOUNT
294 } CC1352R1_LAUNCHXL_AESCTRName;
300 typedef enum CC1352R1_LAUNCHXL_AESECBName {
301 CC1352R1_LAUNCHXL_AESECB0 = 0,
303 CC1352R1_LAUNCHXL_AESECBCOUNT
304 } CC1352R1_LAUNCHXL_AESECBName;
310 typedef enum CC1352R1_LAUNCHXL_AESCTRDRBGName {
311 CC1352R1_LAUNCHXL_AESCTRDRBG0 = 0,
313 CC1352R1_LAUNCHXL_AESCTRDRBGCOUNT
314 } CC1352R1_LAUNCHXL_AESCTRDRBGName;
320 typedef enum CC1352R1_LAUNCHXL_SHA2Name {
321 CC1352R1_LAUNCHXL_SHA20 = 0,
323 CC1352R1_LAUNCHXL_SHA2COUNT
324 } CC1352R1_LAUNCHXL_SHA2Name;
330 typedef enum CC1352R1_LAUNCHXL_TRNGName {
331 CC1352R1_LAUNCHXL_TRNG0 = 0,
333 CC1352R1_LAUNCHXL_TRNGCOUNT
334 } CC1352R1_LAUNCHXL_TRNGName;
340 typedef enum CC1352R1_LAUNCHXL_GPIOName {
341 CC1352R1_LAUNCHXL_GPIO_S1 = 0,
342 CC1352R1_LAUNCHXL_GPIO_S2,
343 CC1352R1_LAUNCHXL_SPI_MASTER_READY,
344 CC1352R1_LAUNCHXL_SPI_SLAVE_READY,
345 CC1352R1_LAUNCHXL_GPIO_LED_GREEN,
346 CC1352R1_LAUNCHXL_GPIO_LED_RED,
347 CC1352R1_LAUNCHXL_GPIO_SPI_FLASH_CS,
348 CC1352R1_LAUNCHXL_SDSPI_CS,
349 CC1352R1_LAUNCHXL_GPIOCOUNT
350 } CC1352R1_LAUNCHXL_GPIOName;
356 typedef enum CC1352R1_LAUNCHXL_GPTimerName {
357 CC1352R1_LAUNCHXL_GPTIMER0A = 0,
358 CC1352R1_LAUNCHXL_GPTIMER0B,
359 CC1352R1_LAUNCHXL_GPTIMER1A,
360 CC1352R1_LAUNCHXL_GPTIMER1B,
361 CC1352R1_LAUNCHXL_GPTIMER2A,
362 CC1352R1_LAUNCHXL_GPTIMER2B,
363 CC1352R1_LAUNCHXL_GPTIMER3A,
364 CC1352R1_LAUNCHXL_GPTIMER3B,
366 CC1352R1_LAUNCHXL_GPTIMERPARTSCOUNT
367 } CC1352R1_LAUNCHXL_GPTimerName;
373 typedef enum CC1352R1_LAUNCHXL_GPTimers {
374 CC1352R1_LAUNCHXL_GPTIMER0 = 0,
375 CC1352R1_LAUNCHXL_GPTIMER1,
376 CC1352R1_LAUNCHXL_GPTIMER2,
377 CC1352R1_LAUNCHXL_GPTIMER3,
379 CC1352R1_LAUNCHXL_GPTIMERCOUNT
380 } CC1352R1_LAUNCHXL_GPTimers;
386 typedef enum CC1352R1_LAUNCHXL_I2CName {
387 #if TI_I2C_CONF_I2C0_ENABLE 388 CC1352R1_LAUNCHXL_I2C0 = 0,
391 CC1352R1_LAUNCHXL_I2CCOUNT
392 } CC1352R1_LAUNCHXL_I2CName;
398 typedef enum CC1352R1_LAUNCHXL_I2SName {
399 CC1352R1_LAUNCHXL_I2S0 = 0,
401 CC1352R1_LAUNCHXL_I2SCOUNT
402 } CC1352R1_LAUNCHXL_I2SName;
408 typedef enum CC1352R1_LAUNCHXL_PDMCOUNT {
409 CC1352R1_LAUNCHXL_PDM0 = 0,
411 CC1352R1_LAUNCHXL_PDMCOUNT
412 } CC1352R1_LAUNCHXL_PDMName;
418 typedef enum CC1352R1_LAUNCHXL_NVSName {
419 #if TI_NVS_CONF_NVS_INTERNAL_ENABLE 420 CC1352R1_LAUNCHXL_NVSCC26XX0 = 0,
422 #if TI_NVS_CONF_NVS_EXTERNAL_ENABLE 423 CC1352R1_LAUNCHXL_NVSSPI25X0,
426 CC1352R1_LAUNCHXL_NVSCOUNT
427 } CC1352R1_LAUNCHXL_NVSName;
433 typedef enum CC1352R1_LAUNCHXL_PWMName {
434 CC1352R1_LAUNCHXL_PWM0 = 0,
435 CC1352R1_LAUNCHXL_PWM1,
436 CC1352R1_LAUNCHXL_PWM2,
437 CC1352R1_LAUNCHXL_PWM3,
438 CC1352R1_LAUNCHXL_PWM4,
439 CC1352R1_LAUNCHXL_PWM5,
440 CC1352R1_LAUNCHXL_PWM6,
441 CC1352R1_LAUNCHXL_PWM7,
443 CC1352R1_LAUNCHXL_PWMCOUNT
444 } CC1352R1_LAUNCHXL_PWMName;
450 typedef enum CC1352R1_LAUNCHXL_SDName {
451 CC1352R1_LAUNCHXL_SDSPI0 = 0,
453 CC1352R1_LAUNCHXL_SDCOUNT
454 } CC1352R1_LAUNCHXL_SDName;
460 typedef enum CC1352R1_LAUNCHXL_SPIName {
461 #if TI_SPI_CONF_SPI0_ENABLE 462 CC1352R1_LAUNCHXL_SPI0 = 0,
464 #if TI_SPI_CONF_SPI1_ENABLE 465 CC1352R1_LAUNCHXL_SPI1,
468 CC1352R1_LAUNCHXL_SPICOUNT
469 } CC1352R1_LAUNCHXL_SPIName;
475 typedef enum CC1352R1_LAUNCHXL_UARTName {
476 #if TI_UART_CONF_UART0_ENABLE 477 CC1352R1_LAUNCHXL_UART0 = 0,
479 #if TI_UART_CONF_UART1_ENABLE 480 CC1352R1_LAUNCHXL_UART1,
483 CC1352R1_LAUNCHXL_UARTCOUNT
484 } CC1352R1_LAUNCHXL_UARTName;
490 typedef enum CC1352R1_LAUNCHXL_UDMAName {
491 CC1352R1_LAUNCHXL_UDMA0 = 0,
493 CC1352R1_LAUNCHXL_UDMACOUNT
494 } CC1352R1_LAUNCHXL_UDMAName;
500 typedef enum CC1352R1_LAUNCHXL_WatchdogName {
501 CC1352R1_LAUNCHXL_WATCHDOG0 = 0,
503 CC1352R1_LAUNCHXL_WATCHDOGCOUNT
504 } CC1352R1_LAUNCHXL_WatchdogName;
void CC1352R1_LAUNCHXL_shutDownExtFlash(void)
Shut down the external flash present on the board files.
void CC1352R1_LAUNCHXL_initGeneral(void)
Initialize the general board specific settings.
void CC1352R1_LAUNCHXL_wakeUpExtFlash(void)
Wake up the external flash present on the board files.