47 #include "sys/clock.h" 51 #include "dev/watchdog.h" 56 #ifdef USB_PULLUP_PORT 57 #define USB_PULLUP_PORT_BASE GPIO_PORT_TO_BASE(USB_PULLUP_PORT) 60 #define USB_PULLUP_PIN_MASK GPIO_PIN_MASK(USB_PULLUP_PIN) 65 #error Control endpoint size too big 69 #error Endpoint 1 size too big 73 #error Endpoint 2 size too big 76 #if USB_EP3_SIZE > 128 77 #error Endpoint 3 size too big 80 #if USB_EP4_SIZE > 256 81 #error Endpoint 4 size too big 84 #if USB_EP5_SIZE > 512 85 #error Endpoint 5 size too big 89 #define UDMA_SIZE_THRESHOLD 8 92 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \ 93 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \ 94 | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE) 96 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \ 97 | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \ 98 | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8) 100 static const uint16_t ep_xfer_size[] = {
109 typedef struct _USBBuffer usb_buffer;
111 struct usb_endpoint {
116 struct process *event_process;
120 typedef struct usb_endpoint usb_endpoint_t;
122 #define EP_STATUS_IDLE 0 123 #define EP_STATUS_RX 1 124 #define EP_STATUS_TX 2 126 #define USB_EP_FLAGS_TYPE_MASK 0x03 127 #define USB_EP_FLAGS_TYPE_BULK 0x00 128 #define USB_EP_FLAGS_TYPE_CONTROL 0x01 129 #define USB_EP_FLAGS_TYPE_ISO 0x02 130 #define USB_EP_FLAGS_TYPE_INTERRUPT 0x03 131 #define USB_EP_FLAGS_ENABLED 0x04 133 #define EP_TYPE(ep) ((ep)->flags & USB_EP_FLAGS_TYPE_MASK) 134 #define IS_EP_TYPE(ep, type) (EP_TYPE(ep) == (type)) 135 #define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL) 136 #define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK) 137 #define IS_INTERRUPT_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_INTERRUPT) 138 #define IS_ISO_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_ISO) 140 #define USBIIE_INEPxIE(x) (1 << x) 141 #define USBOIE_OUEPxIE(x) (1 << x) 142 #define EPxIF(x) (1 << x) 144 #define USB_READ_BLOCK 0x01 145 #define USB_WRITE_NOTIFY 0x02 146 #define USB_READ_NOTIFY 0x02 147 #define USB_READ_FAIL 0x04 150 #define EP_INDEX(addr) ((addr) & 0x7f) 153 #define EP_STRUCT(addr) &usb_endpoints[EP_INDEX(addr)]; 156 #define EP_HW_NUM(addr) ((addr) & 0x7f) 158 static usb_endpoint_t usb_endpoints[USB_MAX_ENDPOINTS];
159 struct process *event_process = 0;
160 volatile static unsigned int events = 0;
161 static uint8_t ep0status;
163 static uint8_t ep0_tx(
void);
164 static uint8_t ep_tx(uint8_t ep_hw);
165 static void in_ep_interrupt_handler(uint8_t ep_hw);
166 static void out_ep_interrupt_handler(uint8_t ep_hw);
167 static void ep0_interrupt_handler(
void);
180 restore_irq(uint8_t enabled)
188 notify_process(
unsigned int e)
197 notify_ep_process(usb_endpoint_t *ep,
unsigned int e)
200 if(ep->event_process) {
206 usb_set_ep_event_process(
unsigned char addr,
struct process *p)
208 usb_endpoint_t *ep = EP_STRUCT(addr);
210 ep->event_process = p;
214 usb_arch_set_global_event_process(
struct process *p)
220 usb_arch_get_global_events(
void)
223 volatile unsigned int e;
225 flag = disable_irq();
236 usb_get_ep_events(uint8_t
addr)
238 volatile unsigned int e;
240 usb_endpoint_t *ep = EP_STRUCT(addr);
242 flag = disable_irq();
253 read_hw_buffer(uint8_t *to, uint8_t hw_ep,
unsigned int len)
255 uint32_t fifo_addr =
USB_F0 + (hw_ep << 3);
261 (uint32_t)(to) + len - 1);
277 *to++ = REG(fifo_addr);
283 write_hw_buffer(uint8_t hw_ep, uint8_t *from,
unsigned int len)
285 uint32_t fifo_addr =
USB_F0 + (hw_ep << 3);
290 (uint32_t)(from) + len - 1);
307 REG(fifo_addr) = *from++;
317 for(e = 0; e < USB_MAX_ENDPOINTS; e++) {
318 if(usb_endpoints[e].flags & USB_EP_FLAGS_ENABLED) {
319 usb_buffer *buffer = usb_endpoints[e].buffer;
321 usb_endpoints[e].flags = 0;
322 usb_disable_endpoint(e);
324 buffer->flags &= ~USB_BUFFER_SUBMITTED;
325 buffer = buffer->next;
329 usb_arch_setup_control_endpoint(0);
348 lpm_register_peripheral(permit_pm1);
357 #if defined(USB_PULLUP_PORT_BASE) && defined(USB_PULLUP_PIN_MASK) 359 GPIO_SET_PIN(USB_PULLUP_PORT_BASE, USB_PULLUP_PIN_MASK);
362 for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
363 usb_endpoints[i].flags = 0;
364 usb_endpoints[i].event_process = 0;
384 usb_submit_recv_buffer(uint8_t
addr, usb_buffer *buffer)
388 usb_endpoint_t *ep = EP_STRUCT(addr);
390 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
394 if(buffer->data == NULL && EP_HW_NUM(addr) == 0) {
395 if(buffer->flags & USB_BUFFER_NOTIFY) {
396 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
401 flag = disable_irq();
405 tailp = &(*tailp)->next;
409 buffer->flags |= USB_BUFFER_SUBMITTED;
410 buffer = buffer->next;
414 if(!EP_HW_NUM(ep->addr)) {
415 if(REG(
USB_CS0) & USB_CS0_OUTPKT_RDY) {
416 ep0_interrupt_handler();
420 out_ep_interrupt_handler(EP_HW_NUM(ep->addr));
428 usb_submit_xmit_buffer(uint8_t addr, usb_buffer *buffer)
433 usb_endpoint_t *ep = EP_STRUCT(addr);
435 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
439 flag = disable_irq();
441 if(EP_HW_NUM(addr) == 0) {
442 if(buffer->data == NULL) {
447 REG(
USB_CS0) = USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
448 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
454 REG(
USB_CS0) = USB_CS0_CLR_OUTPKT_RDY;
460 tailp = &(*tailp)->next;
464 buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
465 buffer = buffer->next;
469 if(EP_HW_NUM(ep->addr)) {
470 res = ep_tx(EP_HW_NUM(ep->addr));
477 if(res & USB_WRITE_NOTIFY) {
478 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
489 in_ep_setup(uint8_t addr)
491 uint8_t ei = EP_HW_NUM(addr);
492 usb_endpoint_t *ep = EP_STRUCT(addr);
495 REG(
USB_IIE) |= USBIIE_INEPxIE(ei);
508 out_ep_setup(uint8_t addr)
510 uint8_t ei = EP_HW_NUM(addr);
511 usb_endpoint_t *ep = EP_STRUCT(addr);
514 REG(
USB_OIE) |= USBOIE_OUEPxIE(ei);
527 ep_setup(uint8_t addr)
529 uint8_t ei = EP_HW_NUM(addr);
531 usb_endpoint_t *ep = EP_STRUCT(addr);
534 ep->flags |= USB_EP_FLAGS_ENABLED;
538 ep->xfer_size = ep_xfer_size[ei];
540 flag = disable_irq();
560 usb_arch_setup_iso_endpoint(uint8_t addr)
562 usb_endpoint_t *ep = EP_STRUCT(addr);
564 ep->flags = USB_EP_FLAGS_TYPE_ISO;
570 usb_arch_setup_control_endpoint(uint8_t addr)
572 usb_endpoint_t *ep = EP_STRUCT(addr);
574 ep->flags = USB_EP_FLAGS_TYPE_CONTROL;
580 usb_arch_setup_bulk_endpoint(uint8_t addr)
582 usb_endpoint_t *ep = EP_STRUCT(addr);
584 ep->flags = USB_EP_FLAGS_TYPE_BULK;
590 usb_arch_setup_interrupt_endpoint(uint8_t addr)
592 usb_endpoint_t *ep = EP_STRUCT(addr);
594 ep->flags = USB_EP_FLAGS_TYPE_INTERRUPT;
608 in_ep_dis(uint8_t addr)
611 REG(
USB_IIE) &= ~USBIIE_INEPxIE(EP_HW_NUM(addr));
614 REG(
USB_CSIL) = USB_CSIL_FLUSH_PACKET;
618 out_ep_dis(uint8_t addr)
621 REG(
USB_OIE) &= ~USBOIE_OUEPxIE(EP_HW_NUM(addr));
624 REG(
USB_CSOL) = USB_CSIL_FLUSH_PACKET;
628 usb_arch_disable_endpoint(uint8_t addr)
630 uint8_t ei = EP_HW_NUM(addr);
632 usb_endpoint_t *ep = EP_STRUCT(addr);
634 ep->flags &= ~USB_EP_FLAGS_ENABLED;
636 flag = disable_irq();
652 usb_arch_discard_all_buffers(uint8_t addr)
656 volatile usb_endpoint_t *ep = EP_STRUCT(addr);
658 flag = disable_irq();
665 buffer->flags &= ~USB_BUFFER_SUBMITTED;
666 buffer = buffer->next;
671 set_stall(uint8_t addr, uint8_t stall)
673 uint8_t ei = EP_HW_NUM(addr);
679 ep0status = EP_STATUS_IDLE;
680 REG(
USB_CS0) |= USB_CS0_SEND_STALL | USB_CS0_OUTPKT_RDY;
685 REG(
USB_CSIL) |= USB_CSIL_SEND_STALL;
687 REG(
USB_CSIL) &= ~USB_CSIL_SEND_STALL;
700 usb_arch_control_stall(uint8_t addr)
702 uint8_t ei = EP_HW_NUM(addr);
705 if(ei > USB_MAX_ENDPOINTS) {
709 flag = disable_irq();
717 usb_arch_halt_endpoint(uint8_t addr,
int halt)
719 uint8_t ei = EP_HW_NUM(addr);
721 usb_endpoint_t *ep = EP_STRUCT(addr);
723 if(ei > USB_MAX_ENDPOINTS) {
727 if(!(ep->flags & USB_EP_FLAGS_ENABLED)) {
731 flag = disable_irq();
740 if(ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
741 ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
742 if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
743 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
745 ep->buffer = ep->buffer->next;
748 out_ep_interrupt_handler(EP_HW_NUM(addr));
756 usb_arch_set_configuration(uint8_t usb_configuration_value)
762 usb_arch_get_ep_status(uint8_t addr)
764 uint8_t ei = EP_INDEX(addr);
765 usb_endpoint_t *ep = EP_STRUCT(addr);
767 if(ei > USB_MAX_ENDPOINTS) {
775 usb_arch_set_address(uint8_t addr)
781 usb_arch_send_pending(uint8_t addr)
785 uint8_t ei = EP_INDEX(addr);
787 flag = disable_irq();
791 ret = REG(
USB_CS0) & USB_CS0_INPKT_RDY;
793 ret = REG(
USB_CSIL) & USB_CSIL_INPKT_RDY;
802 get_receive_capacity(usb_buffer *buffer)
804 unsigned int capacity = 0;
807 !(buffer->flags & (USB_BUFFER_IN | USB_BUFFER_SETUP | USB_BUFFER_HALT))) {
808 capacity += buffer->left;
809 buffer = buffer->next;
815 skip_buffers_until(usb_buffer *buffer,
unsigned int mask,
unsigned int flags,
818 while(buffer && !((buffer->flags & mask) == flags)) {
819 buffer->flags &= ~USB_BUFFER_SUBMITTED;
820 buffer->flags |= USB_BUFFER_FAILED;
821 if(buffer->flags & USB_BUFFER_NOTIFY) {
822 *resp |= USB_READ_NOTIFY;
824 buffer = buffer->next;
830 fill_buffers(usb_buffer *buffer, uint8_t hw_ep,
unsigned int len,
831 uint8_t short_packet)
837 if(buffer->left < len) {
845 read_hw_buffer(buffer->data, hw_ep, t);
853 buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
854 if(buffer->flags & USB_BUFFER_NOTIFY) {
855 res |= USB_READ_NOTIFY;
857 buffer = buffer->next;
861 buffer->flags |= USB_BUFFER_SHORT_PACKET;
864 if((buffer->left == 0) || (buffer->flags & USB_BUFFER_PACKET_END)) {
865 buffer->flags &= ~USB_BUFFER_SUBMITTED;
866 if(buffer->flags & USB_BUFFER_NOTIFY) {
867 res |= USB_READ_NOTIFY;
869 buffer = buffer->next;
872 if(buffer->left && !(buffer->flags & USB_BUFFER_SHORT_END)) {
873 buffer->flags |= USB_BUFFER_FAILED;
874 res |= USB_READ_FAIL;
876 buffer->flags &= ~USB_BUFFER_SUBMITTED;
877 if(buffer->flags & USB_BUFFER_NOTIFY) {
878 res |= USB_READ_NOTIFY;
880 buffer = buffer->next;
884 usb_endpoints[hw_ep].buffer = buffer;
890 ep0_get_setup_pkt(
void)
894 skip_buffers_until(usb_endpoints[0].buffer, USB_BUFFER_SETUP,
895 USB_BUFFER_SETUP, &res);
897 usb_endpoints[0].buffer = buffer;
899 if(!buffer || buffer->left < 8) {
900 return USB_READ_BLOCK;
903 read_hw_buffer(buffer->data, 0, 8);
906 buffer->flags &= ~USB_BUFFER_SUBMITTED;
907 if(buffer->flags & USB_BUFFER_NOTIFY) {
908 res |= USB_READ_NOTIFY;
911 if(buffer->data[6] || buffer->data[7]) {
912 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
913 ep0status = buffer->data[0] & 0x80 ? EP_STATUS_TX : EP_STATUS_RX;
918 usb_endpoints[0].buffer = buffer->next;
924 ep0_get_data_pkt(
void)
927 uint8_t short_packet = 0;
928 usb_buffer *buffer = usb_endpoints[0].buffer;
932 return USB_READ_BLOCK;
935 if(buffer->flags & (USB_BUFFER_SETUP | USB_BUFFER_IN)) {
936 buffer->flags |= USB_BUFFER_FAILED;
937 buffer->flags &= ~USB_BUFFER_SUBMITTED;
938 if(buffer->flags & USB_BUFFER_NOTIFY) {
939 res |= USB_READ_NOTIFY;
945 usb_endpoints[0].buffer = buffer->next;
947 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY | USB_CS0_DATA_END;
949 ep0status = EP_STATUS_IDLE;
953 if(get_receive_capacity(buffer) < len) {
955 return USB_READ_BLOCK;
958 if(len < usb_endpoints[0].xfer_size) {
962 res = fill_buffers(buffer, 0, len, short_packet);
966 ep0status = EP_STATUS_IDLE;
968 REG(
USB_CS0) |= USB_CS0_CLR_OUTPKT_RDY;
976 usb_buffer *buffer = usb_endpoints[0].buffer;
977 unsigned int len = usb_endpoints[0].xfer_size;
978 uint8_t data_end = 0;
982 if((REG(
USB_CS0) & USB_CS0_INPKT_RDY) || (ep0status != EP_STATUS_TX)) {
990 if(!(buffer->flags & USB_BUFFER_IN)) {
998 if(buffer->left < len) {
1005 buffer->left -= copy;
1006 write_hw_buffer(0, buffer->data, copy);
1007 buffer->data += copy;
1008 if(buffer->left == 0) {
1009 if(buffer->flags & USB_BUFFER_SHORT_END) {
1017 buffer->flags &= ~USB_BUFFER_SUBMITTED;
1018 if(buffer->flags & USB_BUFFER_NOTIFY) {
1019 res |= USB_WRITE_NOTIFY;
1021 buffer = buffer->next;
1030 usb_endpoints[0].buffer = buffer;
1037 if(data_end || !buffer) {
1038 ep0status = EP_STATUS_IDLE;
1039 REG(
USB_CS0) |= USB_CS0_INPKT_RDY | USB_CS0_DATA_END;
1041 REG(
USB_CS0) |= USB_CS0_INPKT_RDY;
1048 ep0_interrupt_handler(
void)
1055 if(cs0 & USB_CS0_SENT_STALL) {
1058 ep0status = EP_STATUS_IDLE;
1060 if(cs0 & USB_CS0_SETUP_END) {
1063 ep0status = EP_STATUS_IDLE;
1066 if(cs0 & USB_CS0_OUTPKT_RDY) {
1067 if(ep0status == EP_STATUS_IDLE) {
1068 res = ep0_get_setup_pkt();
1070 res = ep0_get_data_pkt();
1073 if(res & USB_READ_NOTIFY) {
1074 notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
1076 if(res & USB_READ_BLOCK) {
1083 if(res & USB_WRITE_NOTIFY) {
1084 notify_ep_process(&usb_endpoints[0], USB_EP_EVENT_NOTIFICATION);
1089 ep_tx(uint8_t ep_hw)
1093 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1095 len = ep->xfer_size;
1101 if(!ep->buffer || !(ep->buffer->flags & USB_BUFFER_IN)) {
1108 if(ep->buffer->left < len) {
1109 copy = ep->buffer->left;
1115 ep->buffer->left -= copy;
1121 while(REG(
USB_CSIL) & USB_CSIL_INPKT_RDY) {
1125 write_hw_buffer(EP_INDEX(ep_hw), ep->buffer->data, copy);
1126 ep->buffer->data += copy;
1128 if(ep->buffer->left == 0) {
1129 if(ep->buffer->flags & USB_BUFFER_SHORT_END) {
1138 ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
1139 if(ep->buffer->flags & USB_BUFFER_NOTIFY) {
1140 res |= USB_WRITE_NOTIFY;
1142 ep->buffer = ep->buffer->next;
1150 REG(
USB_CSIL) |= USB_CSIL_INPKT_RDY;
1156 ep_get_data_pkt(uint8_t ep_hw)
1160 uint8_t short_packet = 0;
1161 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1164 return USB_READ_BLOCK;
1167 if(ep->buffer->flags & USB_BUFFER_HALT) {
1177 if(get_receive_capacity(ep->buffer) < pkt_len) {
1178 return USB_READ_BLOCK;
1181 if(pkt_len < ep->xfer_size) {
1185 res = fill_buffers(ep->buffer, ep_hw, pkt_len, short_packet);
1193 out_ep_interrupt_handler(uint8_t ep_hw)
1197 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1204 REG(
USB_CSOL) &= ~USB_CSOL_SENT_STALL;
1209 REG(
USB_CSOL) &= ~USB_CSOL_OVERRUN;
1213 res = ep_get_data_pkt(ep_hw);
1215 if(res & USB_READ_NOTIFY) {
1216 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
1222 in_ep_interrupt_handler(uint8_t ep_hw)
1225 #if USB_ARCH_WRITE_NOTIFY 1227 usb_endpoint_t *ep = EP_STRUCT(ep_hw);
1233 if(csl & USB_CSIL_SENT_STALL) {
1234 REG(
USB_CSIL) &= ~USB_CSIL_SENT_STALL;
1237 if(csl & USB_CSIL_UNDERRUN) {
1238 REG(
USB_CSIL) &= ~USB_CSIL_UNDERRUN;
1241 #if USB_ARCH_WRITE_NOTIFY 1242 if(!(csl & USB_CSIL_INPKT_RDY)) {
1244 if(res & USB_WRITE_NOTIFY) {
1245 notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
1262 ep0_interrupt_handler();
1264 for(i = 1; i < 6; i++) {
1265 if(ep_in_if & EPxIF(i)) {
1266 in_ep_interrupt_handler(i);
1271 for(i = 1; i < 6; i++) {
1272 if(ep_out_if & EPxIF(i)) {
1273 out_ep_interrupt_handler(i);
1279 notify_process(USB_EVENT_RESET);
1282 notify_process(USB_EVENT_RESUME);
1285 notify_process(USB_EVENT_SUSPEND);
#define USB_IIE_EP0IE
EP0 interrupt enable.
Header file for the ARM Nested Vectored Interrupt Controller.
#define USB_IIE
IN EPs and EP0 interrupt mask.
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
Sets the channel's destination address.
#define USB_CNT0
Number of RX bytes in EP0 FIFO (Alias for USB_CNT0_CNTL)
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE high.
#define USB_CS0_CLR_SETUP_END
Listed as reserved in the UG, is this right?
#define USB_CSIH
IN EPs control and status (high)
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.
Header file with register and macro declarations for the cc2538 GPIO module.
#define USB_CIF_SUSPENDIF
Suspend interrupt flag.
#define USB_F0
Endpoint-0 FIFO.
#define USB_CNTL
Number of bytes in EP{1-5} OUT FIFO (low) (Alias for USB_CNT0_CNTL)
#define USB_CSOL_SENT_STALL
STALL handshake sent.
#define USB_CIE
Common USB interrupt mask.
#define USB_CNTH
Number of bytes in EP{1-5} OUT FIFO (high)
Header file with declarations for the I/O Control module.
#define USB_CTRL_PLL_LOCKED
PLL locked status.
#define USB_CSOL_OVERRUN
OUT packet can not be loaded into OUT FIFO.
#define USB_INDEX
Current endpoint index register.
Header file with register manipulation macro definitions.
#define USB_CS0
EP0 Control and Status (Alias for USB_CS0_CSIL)
#define USB_CSOH_ISO
Selects OUT endpoint type.
#define USB_CSOL
OUT EPs control and status (low)
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
#define USB_CTRL_USB_EN
USB enable.
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
__STATIC_INLINE uint32_t NVIC_IsIRQEnabled(IRQn_Type IRQn)
Get External Interrupt Enable State.
#define USB_ARCH_CONF_DMA
Change to Enable/Disable USB DMA.
#define USB_MAXI
MAX packet size for IN EPs{1-5}.
void process_poll(struct process *p)
Request a process to be polled.
#define USB_OIE
Out EPs interrupt-enable mask.
#define USB_ARCH_CONF_RX_DMA_CHAN
USB -> RAM DMA channel.
#define USB_IIF_EP0IF
EP0 Interrupt flag.
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
#define USB_CSIL
IN EPs control and status (low) (Alias for USB_CS0_CSIL)
#define USB_OIF
OUT endpoint interrupt flags.
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to output.
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
#define USB_CTRL
USB control register.
Header file with declarations for the cc2538 USB registers.
#define USB_MAXO
MAX packet size for OUT EPs.
#define USB_CIF
Common USB interrupt flags.
#define USB_ADDR
Function address.
#define USB_CTRL_PLL_EN
48-MHz USB PLL enable
#define USB_ARCH_CONF_TX_DMA_CHAN
RAM -> USB DMA channel.
#define USB_CSOL_OUTPKT_RDY
OUT packet read in OUT FIFO.
#define USB_CIF_RSTIF
Reset interrupt flag.
void watchdog_periodic(void)
Writes the WDT clear sequence.
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel's control word.
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
#define USB_CSOL_SEND_STALL
Reply with STALL to OUT tokens.
#define USB_IIF
IN EPs and EP0 interrupt flags.
#define USB_CIF_RESUMEIF
Resume interrupt flag.
#define USB_CSOH
OUT EPs control and status (high)