Go to the documentation of this file. 52 #define SSI_INSTANCE_COUNT 2 58 #define SSI0_BASE 0x40008000 59 #define SSI1_BASE 0x40009000 61 #define SSI_BASE(dev) (SSI0_BASE + (dev) * (SSI1_BASE - SSI0_BASE)) 67 #define SSI_CR0 0x00000000 68 #define SSI_CR1 0x00000004 69 #define SSI_DR 0x00000008 70 #define SSI_SR 0x0000000C 71 #define SSI_CPSR 0x00000010 72 #define SSI_IM 0x00000014 73 #define SSI_RIS 0x00000018 74 #define SSI_MIS 0x0000001C 75 #define SSI_ICR 0x00000020 76 #define SSI_DMACTL 0x00000024 77 #define SSI_CC 0x00000FC8 83 #define SSI_CR0_SCR_M 0x0000FF00 84 #define SSI_CR0_SCR_S 8 85 #define SSI_CR0_SPH_M 0x00000080 86 #define SSI_CR0_SPH_S 7 87 #define SSI_CR0_SPO_M 0x00000040 88 #define SSI_CR0_SPO_S 6 89 #define SSI_CR0_FRF_M 0x00000030 90 #define SSI_CR0_FRF_S 4 91 #define SSI_CR0_DSS_M 0x0000000F 92 #define SSI_CR0_DSS_S 0 93 #define SSI_CR1_SOD_M 0x00000008 94 #define SSI_CR1_SOD_S 3 95 #define SSI_CR1_MS_M 0x00000004 96 #define SSI_CR1_MS_S 2 97 #define SSI_CR1_SSE_M 0x00000002 98 #define SSI_CR1_SSE_S 1 99 #define SSI_CR1_LBM_M 0x00000001 100 #define SSI_CR1_LBM_S 0 101 #define SSI_DR_DATA_M 0x0000FFFF 102 #define SSI_DR_DATA_S 0 103 #define SSI_SR_BSY_M 0x00000010 104 #define SSI_SR_BSY_S 4 105 #define SSI_SR_RFF_M 0x00000008 106 #define SSI_SR_RFF_S 3 107 #define SSI_SR_RNE_M 0x00000004 108 #define SSI_SR_RNE_S 2 109 #define SSI_SR_TNF_M 0x00000002 110 #define SSI_SR_TNF_S 1 111 #define SSI_SR_TFE_M 0x00000001 112 #define SSI_SR_TFE_S 0 113 #define SSI_CPSR_CPSDVSR_M 0x000000FF 114 #define SSI_CPSR_CPSDVSR_S 0 115 #define SSI_IM_TXIM_M 0x00000008 116 #define SSI_IM_TXIM_S 3 117 #define SSI_IM_RXIM_M 0x00000004 118 #define SSI_IM_RXIM_S 2 119 #define SSI_IM_RTIM_M 0x00000002 120 #define SSI_IM_RTIM_S 1 121 #define SSI_IM_RORIM_M 0x00000001 122 #define SSI_IM_RORIM_S 0 123 #define SSI_RIS_TXRIS_M 0x00000008 124 #define SSI_RIS_TXRIS_S 3 125 #define SSI_RIS_RXRIS_M 0x00000004 126 #define SSI_RIS_RXRIS_S 2 127 #define SSI_RIS_RTRIS_M 0x00000002 128 #define SSI_RIS_RTRIS_S 1 129 #define SSI_RIS_RORRIS_M 0x00000001 130 #define SSI_RIS_RORRIS_S 0 131 #define SSI_MIS_TXMIS_M 0x00000008 132 #define SSI_MIS_TXMIS_S 3 133 #define SSI_MIS_RXMIS_M 0x00000004 134 #define SSI_MIS_RXMIS_S 2 135 #define SSI_MIS_RTMIS_M 0x00000002 136 #define SSI_MIS_RTMIS_S 1 137 #define SSI_MIS_RORMIS_M 0x00000001 138 #define SSI_MIS_RORMIS_S 0 139 #define SSI_ICR_RTIC_M 0x00000002 140 #define SSI_ICR_RTIC_S 1 141 #define SSI_ICR_RORIC_M 0x00000001 142 #define SSI_ICR_RORIC_S 0 143 #define SSI_DMACTL_TXDMAE_M 0x00000002 144 #define SSI_DMACTL_TXDMAE_S 1 145 #define SSI_DMACTL_RXDMAE_M 0x00000001 146 #define SSI_DMACTL_RXDMAE_S 0 147 #define SSI_CC_CS_M 0x00000007 148 #define SSI_CC_CS_S 0 154 #define SSI_CR0_SPH 0x00000080 155 #define SSI_CR0_SPO 0x00000040 156 #define SSI_CR0_FRF_MOTOROLA 0x00000000 157 #define SSI_CR0_FRF_TI 0x00000010 158 #define SSI_CR0_FRF_MICROWIRE 0x00000020 159 #define SSI_CR1_SOD 0x00000008 160 #define SSI_CR1_MS 0x00000004 161 #define SSI_CR1_SSE 0x00000002 162 #define SSI_CR1_LBM 0x00000001 163 #define SSI_SR_BSY 0x00000010 164 #define SSI_SR_RFF 0x00000008 165 #define SSI_SR_RNE 0x00000004 166 #define SSI_SR_TNF 0x00000002 167 #define SSI_SR_TFE 0x00000001 168 #define SSI_IM_TXIM 0x00000008 169 #define SSI_IM_RXIM 0x00000004 170 #define SSI_IM_RTIM 0x00000002 171 #define SSI_IM_RORIM 0x00000001 172 #define SSI_RIS_TXRIS 0x00000008 173 #define SSI_RIS_RXRIS 0x00000004 174 #define SSI_RIS_RTRIS 0x00000002 175 #define SSI_RIS_RORRIS 0x00000001 176 #define SSI_MIS_TXMIS 0x00000008 177 #define SSI_MIS_RXMIS 0x00000004 178 #define SSI_MIS_RTMIS 0x00000002 179 #define SSI_MIS_RORMIS 0x00000001 180 #define SSI_ICR_RTIC 0x00000002 181 #define SSI_ICR_RORIC 0x00000001 182 #define SSI_DMACTL_TXDMAE 0x00000002 183 #define SSI_DMACTL_RXDMAE 0x00000001