Contiki-NG
cc2538-rf.c
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1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538-rf
33  * @{
34  *
35  * \file
36  * Implementation of the cc2538 RF driver
37  */
38 #include "contiki.h"
39 #include "dev/radio.h"
40 #include "sys/clock.h"
41 #include "sys/rtimer.h"
42 #include "net/packetbuf.h"
43 #include "net/linkaddr.h"
44 #include "net/netstack.h"
45 #include "net/mac/tsch/tsch.h"
46 #include "sys/energest.h"
47 #include "dev/cc2538-rf.h"
48 #include "dev/rfcore.h"
49 #include "dev/sys-ctrl.h"
50 #include "dev/udma.h"
51 #include "reg.h"
52 
53 #include <string.h>
54 /*---------------------------------------------------------------------------*/
55 #define CHECKSUM_LEN 2
56 
57 /* uDMA channel control persistent flags */
58 #define UDMA_TX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
59  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
60  | UDMA_CHCTL_SRCINC_8 | UDMA_CHCTL_DSTINC_NONE)
61 
62 #define UDMA_RX_FLAGS (UDMA_CHCTL_ARBSIZE_128 | UDMA_CHCTL_XFERMODE_AUTO \
63  | UDMA_CHCTL_SRCSIZE_8 | UDMA_CHCTL_DSTSIZE_8 \
64  | UDMA_CHCTL_SRCINC_NONE | UDMA_CHCTL_DSTINC_8)
65 
66 /*
67  * uDMA transfer threshold. DMA will only be used to read an incoming frame
68  * if its size is above this threshold
69  */
70 #define UDMA_RX_SIZE_THRESHOLD 3
71 /*---------------------------------------------------------------------------*/
72 /* Log configuration */
73 #include "sys/log.h"
74 #define LOG_MODULE "cc2538-rf"
75 #define LOG_LEVEL LOG_LEVEL_NONE
76 /*---------------------------------------------------------------------------*/
77 /* Local RF Flags */
78 #define RX_ACTIVE 0x80
79 #define RF_MUST_RESET 0x40
80 #define RF_ON 0x01
81 
82 /* Bit Masks for the last byte in the RX FIFO */
83 #define CRC_BIT_MASK 0x80
84 #define LQI_BIT_MASK 0x7F
85 /* RSSI Offset */
86 #define RSSI_OFFSET 73
87 #define RSSI_INVALID -128
88 
89 /* 192 usec off -> on interval (RX Callib -> SFD Wait). We wait a bit more */
90 #define ONOFF_TIME RTIMER_ARCH_SECOND / 3125
91 /*---------------------------------------------------------------------------*/
92 #ifdef CC2538_RF_CONF_AUTOACK
93 #define CC2538_RF_AUTOACK CC2538_RF_CONF_AUTOACK
94 #else
95 #define CC2538_RF_AUTOACK 1
96 #endif
97 /*---------------------------------------------------------------------------
98  * MAC timer
99  *---------------------------------------------------------------------------*/
100 /* Timer conversion */
101 #define RADIO_TO_RTIMER(X) ((uint32_t)((uint64_t)(X) * RTIMER_ARCH_SECOND / SYS_CTRL_32MHZ))
102 
103 #define CLOCK_STABLE() do { \
104  while ( !(REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB))); \
105  } while(0)
106 /*---------------------------------------------------------------------------*/
107 /* Are we currently in poll mode? Disabled by default */
108 static uint8_t volatile poll_mode = 0;
109 /* Do we perform a CCA before sending? Enabled by default. */
110 static uint8_t send_on_cca = 1;
111 static int8_t rssi;
112 static uint8_t crc_corr;
113 /*---------------------------------------------------------------------------*/
114 static uint8_t rf_flags;
115 static uint8_t rf_channel = IEEE802154_DEFAULT_CHANNEL;
116 
117 static int on(void);
118 static int off(void);
119 /*---------------------------------------------------------------------------*/
120 /* TX Power dBm lookup table. Values from SmartRF Studio v1.16.0 */
121 typedef struct output_config {
122  radio_value_t power;
123  uint8_t txpower_val;
124 } output_config_t;
125 
126 static const output_config_t output_power[] = {
127  { 7, 0xFF },
128  { 5, 0xED },
129  { 3, 0xD5 },
130  { 1, 0xC5 },
131  { 0, 0xB6 },
132  { -1, 0xB0 },
133  { -3, 0xA1 },
134  { -5, 0x91 },
135  { -7, 0x88 },
136  { -9, 0x72 },
137  {-11, 0x62 },
138  {-13, 0x58 },
139  {-15, 0x42 },
140  {-24, 0x00 },
141 };
142 
143 #define OUTPUT_CONFIG_COUNT (sizeof(output_power) / sizeof(output_config_t))
144 
145 /* Max and Min Output Power in dBm */
146 #define OUTPUT_POWER_MIN (output_power[OUTPUT_CONFIG_COUNT - 1].power)
147 #define OUTPUT_POWER_MAX (output_power[0].power)
148 /*---------------------------------------------------------------------------*/
149 PROCESS(cc2538_rf_process, "cc2538 RF driver");
150 /*---------------------------------------------------------------------------*/
151 /**
152  * \brief Get the current operating channel
153  * \return Returns a value in [11,26] representing the current channel
154  */
155 static uint8_t
157 {
158  return rf_channel;
159 }
160 /*---------------------------------------------------------------------------*/
161 /**
162  * \brief Set the current operating channel
163  * \param channel The desired channel as a value in [11,26]
164  */
165 static void
166 set_channel(uint8_t channel)
167 {
168  uint8_t was_on = 0;
169 
170  LOG_INFO("Set Channel\n");
171 
172  /* Changes to FREQCTRL take effect after the next recalibration */
173 
174  /* If we are off, save state, otherwise switch off and save state */
176  was_on = 1;
177  off();
178  }
179  REG(RFCORE_XREG_FREQCTRL) = CC2538_RF_CHANNEL_MIN +
180  (channel - CC2538_RF_CHANNEL_MIN) * CC2538_RF_CHANNEL_SPACING;
181 
182  /* switch radio back on only if radio was on before - otherwise will turn on radio foor sleepy nodes */
183  if(was_on) {
184  on();
185  }
186 
187  rf_channel = channel;
188 }
189 /*---------------------------------------------------------------------------*/
190 static radio_value_t
191 get_pan_id(void)
192 {
193  return (radio_value_t)(REG(RFCORE_FFSM_PAN_ID1) << 8 | REG(RFCORE_FFSM_PAN_ID0));
194 }
195 /*---------------------------------------------------------------------------*/
196 static void
197 set_pan_id(uint16_t pan)
198 {
199  REG(RFCORE_FFSM_PAN_ID0) = pan & 0xFF;
200  REG(RFCORE_FFSM_PAN_ID1) = pan >> 8;
201 }
202 /*---------------------------------------------------------------------------*/
203 static radio_value_t
204 get_short_addr(void)
205 {
207 }
208 /*---------------------------------------------------------------------------*/
209 static void
210 set_short_addr(uint16_t addr)
211 {
212  REG(RFCORE_FFSM_SHORT_ADDR0) = addr & 0xFF;
213  REG(RFCORE_FFSM_SHORT_ADDR1) = addr >> 8;
214 }
215 /*---------------------------------------------------------------------------*/
216 /**
217  * \brief Reads the current signal strength (RSSI)
218  * \return The current RSSI in dBm
219  *
220  * This function reads the current RSSI on the currently configured
221  * channel.
222  */
223 static radio_value_t
224 get_rssi(void)
225 {
226  int8_t rssi;
227  uint8_t was_off = 0;
228 
229  /* If we are off, turn on first */
231  was_off = 1;
232  on();
233  }
234 
235  /* Wait for a valid RSSI reading */
236  do {
237  rssi = REG(RFCORE_XREG_RSSI);
238  } while(rssi == RSSI_INVALID);
239  rssi -= RSSI_OFFSET;
240 
241  /* If we were off, turn back off */
242  if(was_off) {
243  off();
244  }
245 
246  return rssi;
247 }
248 /*---------------------------------------------------------------------------*/
249 /* Returns the current CCA threshold in dBm */
250 static radio_value_t
251 get_cca_threshold(void)
252 {
253  return (int8_t)(REG(RFCORE_XREG_CCACTRL0) & RFCORE_XREG_CCACTRL0_CCA_THR) - RSSI_OFFSET;
254 }
255 /*---------------------------------------------------------------------------*/
256 /* Sets the CCA threshold in dBm */
257 static void
258 set_cca_threshold(radio_value_t value)
259 {
260  REG(RFCORE_XREG_CCACTRL0) = (value & 0xFF) + RSSI_OFFSET;
261 }
262 /*---------------------------------------------------------------------------*/
263 /* Returns the current TX power in dBm */
264 static radio_value_t
265 get_tx_power(void)
266 {
267  int i;
268  uint8_t reg_val = REG(RFCORE_XREG_TXPOWER) & 0xFF;
269 
270  /*
271  * Find the TXPOWER value in the lookup table
272  * If the value has been written with set_tx_power, we should be able to
273  * find the exact value. However, in case the register has been written in
274  * a different fashion, we return the immediately lower value of the lookup
275  */
276  for(i = 0; i < OUTPUT_CONFIG_COUNT; i++) {
277  if(reg_val >= output_power[i].txpower_val) {
278  return output_power[i].power;
279  }
280  }
281  return OUTPUT_POWER_MIN;
282 }
283 /*---------------------------------------------------------------------------*/
284 /*
285  * Set TX power to 'at least' power dBm
286  * This works with a lookup table. If the value of 'power' does not exist in
287  * the lookup table, TXPOWER will be set to the immediately higher available
288  * value
289  */
290 static void
291 set_tx_power(radio_value_t power)
292 {
293  int i;
294 
295  for(i = OUTPUT_CONFIG_COUNT - 1; i >= 0; --i) {
296  if(power <= output_power[i].power) {
297  REG(RFCORE_XREG_TXPOWER) = output_power[i].txpower_val;
298  return;
299  }
300  }
301 }
302 /*---------------------------------------------------------------------------*/
303 static void
304 set_frame_filtering(uint8_t enable)
305 {
306  if(enable) {
308  } else {
310  }
311 }
312 /*---------------------------------------------------------------------------*/
313 static void
314 set_shr_search(int enable)
315 {
316  if(enable) {
318  } else {
320  }
321 }
322 /*---------------------------------------------------------------------------*/
323 static void
324 mac_timer_init(void)
325 {
326  CLOCK_STABLE();
331  while(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE);
334  while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
335 }
336 /*---------------------------------------------------------------------------*/
337 static void
338 set_poll_mode(uint8_t enable)
339 {
340  poll_mode = enable;
341 
342  if(enable) {
343  mac_timer_init();
344  REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; /* mask out FIFOP interrupt source */
345  REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; /* clear pending FIFOP interrupt */
346  NVIC_DisableIRQ(RF_TX_RX_IRQn); /* disable RF interrupts */
347  } else {
348  REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; /* enable FIFOP interrupt source */
349  NVIC_EnableIRQ(RF_TX_RX_IRQn); /* enable RF interrupts */
350  }
351 }
352 /*---------------------------------------------------------------------------*/
353 static void
354 set_send_on_cca(uint8_t enable)
355 {
356  send_on_cca = enable;
357 }
358 /*---------------------------------------------------------------------------*/
359 static void
360 set_auto_ack(uint8_t enable)
361 {
362  if(enable) {
364  } else {
366  }
367 }
368 /*---------------------------------------------------------------------------*/
369 static uint32_t
370 get_sfd_timestamp(void)
371 {
372  uint64_t sfd, timer_val, buffer;
373 
374  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000000;
376  timer_val = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
377  timer_val |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
379  timer_val |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
380  timer_val |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
382  timer_val |= (buffer << 32);
383 
384  REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
387  sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
389  sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
390  sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
392  sfd |= (buffer << 32);
393 
394  return RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd);
395 }
396 /*---------------------------------------------------------------------------*/
397 /* Netstack API radio driver functions */
398 /*---------------------------------------------------------------------------*/
399 static int
400 channel_clear(void)
401 {
402  int cca;
403  uint8_t was_off = 0;
404 
405  LOG_INFO("CCA\n");
406 
407  /* If we are off, turn on first */
409  was_off = 1;
410  on();
411  }
412 
413  /* Wait on RSSI_VALID */
415 
417  cca = CC2538_RF_CCA_CLEAR;
418  } else {
419  cca = CC2538_RF_CCA_BUSY;
420  }
421 
422  /* If we were off, turn back off */
423  if(was_off) {
424  off();
425  }
426 
427  return cca;
428 }
429 /*---------------------------------------------------------------------------*/
430 static int
431 on(void)
432 {
433  LOG_INFO("On\n");
434 
435  if(!(rf_flags & RX_ACTIVE)) {
438 
439  rf_flags |= RX_ACTIVE;
440  }
441 
442  ENERGEST_ON(ENERGEST_TYPE_LISTEN);
443  return 1;
444 }
445 /*---------------------------------------------------------------------------*/
446 static int
447 off(void)
448 {
449  LOG_INFO("Off\n");
450 
451  /* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
453 
456  }
457 
458  /* Don't turn off if we are off as this will trigger a Strobe Error */
459  if(REG(RFCORE_XREG_RXENABLE) != 0) {
461  }
462 
463  rf_flags &= ~RX_ACTIVE;
464 
465  ENERGEST_OFF(ENERGEST_TYPE_LISTEN);
466  return 1;
467 }
468 /*---------------------------------------------------------------------------*/
469 static int
470 init(void)
471 {
472  LOG_INFO("Init\n");
473 
474  if(rf_flags & RF_ON) {
475  return 0;
476  }
477 
478  /* Enable clock for the RF Core while Running, in Sleep and Deep Sleep */
479  REG(SYS_CTRL_RCGCRFC) = 1;
480  REG(SYS_CTRL_SCGCRFC) = 1;
481  REG(SYS_CTRL_DCGCRFC) = 1;
482 
483  REG(RFCORE_XREG_CCACTRL0) = CC2538_RF_CCA_THRES;
484 
485  /*
486  * Changes from default values
487  * See User Guide, section "Register Settings Update"
488  */
489  REG(RFCORE_XREG_TXFILTCFG) = 0x09; /** TX anti-aliasing filter bandwidth */
490  REG(RFCORE_XREG_AGCCTRL1) = 0x15; /** AGC target value */
491  REG(ANA_REGS_IVCTRL) = 0x0B; /** Bias currents */
492  REG(RFCORE_XREG_FSCAL1) = 0x01; /** Tune frequency calibration */
493 
494  /*
495  * Defaults:
496  * Auto CRC; Append RSSI, CRC-OK and Corr. Val.; CRC calculation;
497  * RX and TX modes with FIFOs
498  */
500 
501 #if CC2538_RF_AUTOACK
503 #endif
504 
505  /* Disable source address matching and autopend */
506  REG(RFCORE_XREG_SRCMATCH) = 0;
507 
508  /* MAX FIFOP threshold */
509  REG(RFCORE_XREG_FIFOPCTRL) = CC2538_RF_MAX_PACKET_LEN;
510 
511  /* Set TX Power */
512  REG(RFCORE_XREG_TXPOWER) = CC2538_RF_TX_POWER;
513 
514  set_channel(rf_channel);
515 
516  /* Enable SHR search */
517  set_shr_search(1);
518 
519  /* Acknowledge all RF Error interrupts */
522 
524  /* Disable peripheral triggers for the channel */
526 
527  /*
528  * Set the channel's DST. SRC can not be set yet since it will change for
529  * each transfer
530  */
532  }
533 
535  /* Disable peripheral triggers for the channel */
537 
538  /*
539  * Set the channel's SRC. DST can not be set yet since it will change for
540  * each transfer
541  */
543  }
544 
545  set_poll_mode(poll_mode);
546 
547  process_start(&cc2538_rf_process, NULL);
548 
549  rf_flags |= RF_ON;
550 
551  return 1;
552 }
553 /*---------------------------------------------------------------------------*/
554 static int
555 prepare(const void *payload, unsigned short payload_len)
556 {
557  uint8_t i;
558 
559  LOG_INFO("Prepare 0x%02x bytes\n", payload_len + CHECKSUM_LEN);
560 
561  /*
562  * When we transmit in very quick bursts, make sure previous transmission
563  * is not still in progress before re-writing to the TX FIFO
564  */
566 
567  if((rf_flags & RX_ACTIVE) == 0) {
568  on();
569  }
570 
572 
573  LOG_INFO("data = ");
574  /* Send the phy length byte first */
575  REG(RFCORE_SFR_RFDATA) = payload_len + CHECKSUM_LEN;
576 
578  LOG_INFO_("<uDMA payload>");
579 
580  /* Set the transfer source's end address */
582  (uint32_t)(payload) + payload_len - 1);
583 
584  /* Configure the control word */
586  UDMA_TX_FLAGS | udma_xfer_size(payload_len));
587 
588  /* Enabled the RF TX uDMA channel */
590 
591  /* Trigger the uDMA transfer */
593 
594  /*
595  * No need to wait for this to end. Even if transmit() gets called
596  * immediately, the uDMA controller will stream the frame to the TX FIFO
597  * faster than transmit() can empty it
598  */
599  } else {
600  for(i = 0; i < payload_len; i++) {
601  REG(RFCORE_SFR_RFDATA) = ((unsigned char *)(payload))[i];
602  LOG_INFO_("%02x", ((unsigned char *)(payload))[i]);
603  }
604  }
605  LOG_INFO_("\n");
606 
607  return 0;
608 }
609 /*---------------------------------------------------------------------------*/
610 static int
611 transmit(unsigned short transmit_len)
612 {
613  uint8_t counter;
614  int ret = RADIO_TX_ERR;
615  rtimer_clock_t t0;
616  uint8_t was_off = 0;
617 
618  LOG_INFO("Transmit\n");
619 
620  if(!(rf_flags & RX_ACTIVE)) {
621  t0 = RTIMER_NOW();
622  on();
623  was_off = 1;
624  while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
625  }
626 
627  if(send_on_cca) {
628  if(channel_clear() == CC2538_RF_CCA_BUSY) {
629  return RADIO_TX_COLLISION;
630  }
631  }
632 
633  /*
634  * prepare() double checked that TX_ACTIVE is low. If SFD is high we are
635  * receiving. Abort transmission and bail out with RADIO_TX_COLLISION
636  */
638  return RADIO_TX_COLLISION;
639  }
640 
641  /* Start the transmission */
642  ENERGEST_SWITCH(ENERGEST_TYPE_LISTEN, ENERGEST_TYPE_TRANSMIT);
643 
645 
646  counter = 0;
648  && (counter++ < 3)) {
649  clock_delay_usec(6);
650  }
651 
652  if(!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE)) {
653  LOG_ERR("TX never active.\n");
655  ret = RADIO_TX_ERR;
656  } else {
657  /* Wait for the transmission to finish */
658  while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
659  ret = RADIO_TX_OK;
660  }
661  ENERGEST_SWITCH(ENERGEST_TYPE_TRANSMIT, ENERGEST_TYPE_LISTEN);
662 
663  if(was_off) {
664  off();
665  }
666 
667  return ret;
668 }
669 /*---------------------------------------------------------------------------*/
670 static int
671 send(const void *payload, unsigned short payload_len)
672 {
673  prepare(payload, payload_len);
674  return transmit(payload_len);
675 }
676 /*---------------------------------------------------------------------------*/
677 static int
678 read(void *buf, unsigned short bufsize)
679 {
680  uint8_t i;
681  uint8_t len;
682 
683  LOG_INFO("Read\n");
684 
686  return 0;
687  }
688 
689  /* Check the length */
690  len = REG(RFCORE_SFR_RFDATA);
691 
692  /* Check for validity */
693  if(len > CC2538_RF_MAX_PACKET_LEN) {
694  /* Oops, we must be out of sync. */
695  LOG_ERR("RF: bad sync\n");
696 
698  return 0;
699  }
700 
701  if(len <= CC2538_RF_MIN_PACKET_LEN) {
702  LOG_ERR("RF: too short\n");
703 
705  return 0;
706  }
707 
708  if(len - CHECKSUM_LEN > bufsize) {
709  LOG_ERR("RF: too long\n");
710 
712  return 0;
713  }
714 
715  /* If we reach here, chances are the FIFO is holding a valid frame */
716  LOG_INFO("read (0x%02x bytes) = ", len);
717  len -= CHECKSUM_LEN;
718 
719  /* Don't bother with uDMA for short frames (e.g. ACKs) */
720  if(CC2538_RF_CONF_RX_USE_DMA && len > UDMA_RX_SIZE_THRESHOLD) {
721  LOG_INFO_("<uDMA payload>");
722 
723  /* Set the transfer destination's end address */
725  (uint32_t)(buf) + len - 1);
726 
727  /* Configure the control word */
729  UDMA_RX_FLAGS | udma_xfer_size(len));
730 
731  /* Enabled the RF RX uDMA channel */
733 
734  /* Trigger the uDMA transfer */
736 
737  /* Wait for the transfer to complete. */
739  } else {
740  for(i = 0; i < len; ++i) {
741  ((unsigned char *)(buf))[i] = REG(RFCORE_SFR_RFDATA);
742  LOG_INFO_("%02x", ((unsigned char *)(buf))[i]);
743  }
744  }
745 
746  /* Read the RSSI and CRC/Corr bytes */
747  rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
748  crc_corr = REG(RFCORE_SFR_RFDATA);
749 
750  LOG_INFO_("%02x%02x\n", (uint8_t)rssi, crc_corr);
751 
752  /* MS bit CRC OK/Not OK, 7 LS Bits, Correlation value */
753  if(crc_corr & CRC_BIT_MASK) {
754  packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
755  packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
756  } else {
757  LOG_ERR("Bad CRC\n");
759  return 0;
760  }
761 
762  if(!poll_mode) {
763  /* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
764  if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
766  process_poll(&cc2538_rf_process);
767  } else {
769  }
770  }
771  }
772 
773  return len;
774 }
775 /*---------------------------------------------------------------------------*/
776 static int
777 receiving_packet(void)
778 {
779  LOG_INFO("Receiving\n");
780 
781  /*
782  * SFD high while transmitting and receiving.
783  * TX_ACTIVE high only when transmitting
784  *
785  * FSMSTAT1 & (TX_ACTIVE | SFD) == SFD <=> receiving
786  */
787  return (REG(RFCORE_XREG_FSMSTAT1)
790 }
791 /*---------------------------------------------------------------------------*/
792 static int
793 pending_packet(void)
794 {
795  LOG_INFO("Pending\n");
796 
798 }
799 /*---------------------------------------------------------------------------*/
800 static radio_result_t
801 get_value(radio_param_t param, radio_value_t *value)
802 {
803  if(!value) {
804  return RADIO_RESULT_INVALID_VALUE;
805  }
806 
807  switch(param) {
808  case RADIO_PARAM_POWER_MODE:
810  ? RADIO_POWER_MODE_OFF : RADIO_POWER_MODE_ON;
811  return RADIO_RESULT_OK;
812  case RADIO_PARAM_CHANNEL:
813  *value = (radio_value_t)get_channel();
814  return RADIO_RESULT_OK;
815  case RADIO_PARAM_PAN_ID:
816  *value = get_pan_id();
817  return RADIO_RESULT_OK;
818  case RADIO_PARAM_16BIT_ADDR:
819  *value = get_short_addr();
820  return RADIO_RESULT_OK;
821  case RADIO_PARAM_RX_MODE:
822  *value = 0;
825  }
827  *value |= RADIO_RX_MODE_AUTOACK;
828  }
829  if(poll_mode) {
830  *value |= RADIO_RX_MODE_POLL_MODE;
831  }
832  return RADIO_RESULT_OK;
833  case RADIO_PARAM_TX_MODE:
834  *value = 0;
835  if(send_on_cca) {
836  *value |= RADIO_TX_MODE_SEND_ON_CCA;
837  }
838  return RADIO_RESULT_OK;
839  case RADIO_PARAM_TXPOWER:
840  *value = get_tx_power();
841  return RADIO_RESULT_OK;
842  case RADIO_PARAM_CCA_THRESHOLD:
843  *value = get_cca_threshold();
844  return RADIO_RESULT_OK;
845  case RADIO_PARAM_RSSI:
846  *value = get_rssi();
847  return RADIO_RESULT_OK;
848  case RADIO_PARAM_LAST_RSSI:
849  *value = rssi;
850  return RADIO_RESULT_OK;
851  case RADIO_PARAM_LAST_LINK_QUALITY:
852  *value = crc_corr & LQI_BIT_MASK;
853  return RADIO_RESULT_OK;
854  case RADIO_CONST_CHANNEL_MIN:
855  *value = CC2538_RF_CHANNEL_MIN;
856  return RADIO_RESULT_OK;
857  case RADIO_CONST_CHANNEL_MAX:
858  *value = CC2538_RF_CHANNEL_MAX;
859  return RADIO_RESULT_OK;
860  case RADIO_CONST_TXPOWER_MIN:
861  *value = OUTPUT_POWER_MIN;
862  return RADIO_RESULT_OK;
863  case RADIO_CONST_TXPOWER_MAX:
864  *value = OUTPUT_POWER_MAX;
865  return RADIO_RESULT_OK;
866  case RADIO_CONST_PHY_OVERHEAD:
867  *value = (radio_value_t)3; /* 1 len byte, 2 bytes CRC */
868  return RADIO_RESULT_OK;
869  case RADIO_CONST_BYTE_AIR_TIME:
870  *value = (radio_value_t)32; /* 250kbps data rate. One byte = 32us.*/
871  return RADIO_RESULT_OK;
872  case RADIO_CONST_DELAY_BEFORE_TX:
873  *value = (radio_value_t)CC2538_DELAY_BEFORE_TX;
874  return RADIO_RESULT_OK;
875  case RADIO_CONST_DELAY_BEFORE_RX:
876  *value = (radio_value_t)CC2538_DELAY_BEFORE_RX;
877  return RADIO_RESULT_OK;
878  case RADIO_CONST_DELAY_BEFORE_DETECT:
879  *value = (radio_value_t)CC2538_DELAY_BEFORE_DETECT;
880  return RADIO_RESULT_OK;
881  default:
882  return RADIO_RESULT_NOT_SUPPORTED;
883  }
884 }
885 /*---------------------------------------------------------------------------*/
886 static radio_result_t
887 set_value(radio_param_t param, radio_value_t value)
888 {
889  switch(param) {
890  case RADIO_PARAM_POWER_MODE:
891  if(value == RADIO_POWER_MODE_ON) {
892  on();
893  return RADIO_RESULT_OK;
894  }
895  if(value == RADIO_POWER_MODE_OFF) {
896  off();
897  return RADIO_RESULT_OK;
898  }
899  return RADIO_RESULT_INVALID_VALUE;
900  case RADIO_PARAM_CHANNEL:
901  if(value < CC2538_RF_CHANNEL_MIN ||
902  value > CC2538_RF_CHANNEL_MAX) {
903  return RADIO_RESULT_INVALID_VALUE;
904  }
905  set_channel(value);
906  return RADIO_RESULT_OK;
907  case RADIO_PARAM_PAN_ID:
908  set_pan_id(value & 0xffff);
909  return RADIO_RESULT_OK;
910  case RADIO_PARAM_16BIT_ADDR:
911  set_short_addr(value & 0xffff);
912  return RADIO_RESULT_OK;
913  case RADIO_PARAM_RX_MODE:
914  if(value & ~(RADIO_RX_MODE_ADDRESS_FILTER |
915  RADIO_RX_MODE_AUTOACK |
916  RADIO_RX_MODE_POLL_MODE)) {
917  return RADIO_RESULT_INVALID_VALUE;
918  }
919 
920  set_frame_filtering((value & RADIO_RX_MODE_ADDRESS_FILTER) != 0);
921  set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
922  set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
923 
924  return RADIO_RESULT_OK;
925  case RADIO_PARAM_TX_MODE:
926  if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
927  return RADIO_RESULT_INVALID_VALUE;
928  }
929  set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
930  return RADIO_RESULT_OK;
931  case RADIO_PARAM_TXPOWER:
932  if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
933  return RADIO_RESULT_INVALID_VALUE;
934  }
935 
936  set_tx_power(value);
937  return RADIO_RESULT_OK;
938  case RADIO_PARAM_CCA_THRESHOLD:
939  set_cca_threshold(value);
940  return RADIO_RESULT_OK;
941  case RADIO_PARAM_SHR_SEARCH:
942  set_shr_search(value);
943  return RADIO_RESULT_OK;
944  default:
945  return RADIO_RESULT_NOT_SUPPORTED;
946  }
947 }
948 /*---------------------------------------------------------------------------*/
949 static radio_result_t
950 get_object(radio_param_t param, void *dest, size_t size)
951 {
952  uint8_t *target;
953  int i;
954 
955  if(param == RADIO_PARAM_64BIT_ADDR) {
956  if(size != 8 || !dest) {
957  return RADIO_RESULT_INVALID_VALUE;
958  }
959 
960  target = dest;
961  for(i = 0; i < 8; i++) {
962  target[i] = ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[7 - i] & 0xFF;
963  }
964 
965  return RADIO_RESULT_OK;
966  }
967 
968  if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
969  if(size != sizeof(rtimer_clock_t) || !dest) {
970  return RADIO_RESULT_INVALID_VALUE;
971  }
972  *(rtimer_clock_t *)dest = get_sfd_timestamp();
973  return RADIO_RESULT_OK;
974  }
975 
976 #if MAC_CONF_WITH_TSCH
977  if(param == RADIO_CONST_TSCH_TIMING) {
978  if(size != sizeof(uint16_t *) || !dest) {
979  return RADIO_RESULT_INVALID_VALUE;
980  }
981  *(const uint16_t **)dest = tsch_timeslot_timing_us_10000;
982  return RADIO_RESULT_OK;
983  }
984 #endif /* MAC_CONF_WITH_TSCH */
985 
986  return RADIO_RESULT_NOT_SUPPORTED;
987 }
988 /*---------------------------------------------------------------------------*/
989 static radio_result_t
990 set_object(radio_param_t param, const void *src, size_t size)
991 {
992  int i;
993 
994  if(param == RADIO_PARAM_64BIT_ADDR) {
995  if(size != 8 || !src) {
996  return RADIO_RESULT_INVALID_VALUE;
997  }
998 
999  for(i = 0; i < 8; i++) {
1000  ((uint32_t *)RFCORE_FFSM_EXT_ADDR0)[i] = ((uint8_t *)src)[7 - i];
1001  }
1002 
1003  return RADIO_RESULT_OK;
1004  }
1005  return RADIO_RESULT_NOT_SUPPORTED;
1006 }
1007 /*---------------------------------------------------------------------------*/
1009  init,
1010  prepare,
1011  transmit,
1012  send,
1013  read,
1014  channel_clear,
1017  on,
1018  off,
1019  get_value,
1020  set_value,
1021  get_object,
1022  set_object
1023 };
1024 /*---------------------------------------------------------------------------*/
1025 /**
1026  * \brief Implementation of the cc2538 RF driver process
1027  *
1028  * This process is started by init(). It simply sits there waiting for
1029  * an event. Upon frame reception, the RX ISR will poll this process.
1030  * Subsequently, the contiki core will generate an event which will
1031  * call this process so that the received frame can be picked up from
1032  * the RF RX FIFO
1033  *
1034  */
1035 PROCESS_THREAD(cc2538_rf_process, ev, data)
1036 {
1037  int len;
1038  PROCESS_BEGIN();
1039 
1040  while(1) {
1041  /* Only if we are not in poll mode oder we are in poll mode and transceiver has to be reset */
1042  PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
1043 
1044  if(!poll_mode) {
1045  packetbuf_clear();
1047 
1048  if(len > 0) {
1049  packetbuf_set_datalen(len);
1050 
1051  NETSTACK_MAC.input();
1052  }
1053  }
1054 
1055  /* If we were polled due to an RF error, reset the transceiver */
1056  if(rf_flags & RF_MUST_RESET) {
1057  uint8_t was_on;
1058  rf_flags = 0;
1059 
1060  /* save state so we know if to switch on again after re-init */
1062  was_on = 0;
1063  } else {
1064  was_on = 1;
1065  }
1066  off();
1067  init();
1068  if(was_on) {
1069  /* switch back on */
1070  on();
1071  }
1072  }
1073  }
1074 
1075  PROCESS_END();
1076 }
1077 /*---------------------------------------------------------------------------*/
1078 /**
1079  * \brief The cc2538 RF RX/TX ISR
1080  *
1081  * This is the interrupt service routine for all RF interrupts relating
1082  * to RX and TX. Error conditions are handled by cc2538_rf_err_isr().
1083  * Currently, we only acknowledge the FIFOP interrupt source.
1084  */
1085 void
1087 {
1088  if(!poll_mode) {
1089  process_poll(&cc2538_rf_process);
1090  }
1091 
1092  /* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
1093  REG(RFCORE_SFR_RFIRQF0) = 0;
1094 }
1095 /*---------------------------------------------------------------------------*/
1096 /**
1097  * \brief The cc2538 RF Error ISR
1098  *
1099  * This is the interrupt service routine for all RF errors. We
1100  * acknowledge every error type and instead of trying to be smart and
1101  * act differently depending on error condition, we simply reset the
1102  * transceiver. RX FIFO overflow is an exception, we ignore this error
1103  * since read() handles it anyway.
1104  *
1105  * However, we don't want to reset within this ISR. If the error occurs
1106  * while we are reading a frame out of the FIFO, trashing the FIFO in
1107  * the middle of read(), would result in further errors (RX underflows).
1108  *
1109  * Instead, we set a flag and poll the driver process. The process will
1110  * reset the transceiver without any undesirable consequences.
1111  */
1112 void
1114 {
1115  LOG_ERR("Error 0x%08lx occurred\n", REG(RFCORE_SFR_RFERRF));
1116 
1117  /* If the error is not an RX FIFO overflow, set a flag */
1119  rf_flags |= RF_MUST_RESET;
1120  }
1121 
1122  REG(RFCORE_SFR_RFERRF) = 0;
1123 
1124  process_poll(&cc2538_rf_process);
1125 }
1126 /*---------------------------------------------------------------------------*/
1127 
1128 /** @} */
radio_result_t(* get_object)(radio_param_t param, void *dest, size_t size)
Get a radio parameter object.
Definition: radio.h:290
#define RFCORE_FFSM_SHORT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:64
void * packetbuf_dataptr(void)
Get a pointer to the data in the packetbuf.
Definition: packetbuf.c:143
Top-level header file for cc2538 RF Core registers.
int(* prepare)(const void *payload, unsigned short payload_len)
Prepare the radio with a packet to be sent.
Definition: radio.h:252
#define RFCORE_SFR_MTM1_MTM1
Register[15:8].
Definition: rfcore-sfr.h:116
#define RFCORE_XREG_SRCMATCH
Source address matching.
Definition: rfcore-xreg.h:46
#define SYS_CTRL_RCGCRFC
RF Core clocks - active mode.
Definition: sys-ctrl.h:93
#define PROCESS(name, strname)
Declare a process.
Definition: process.h:307
#define RFCORE_SFR_MTCTRL_SYNC
Timer start/stop timing.
Definition: rfcore-sfr.h:79
#define RFCORE_SFR_MTMOVF0
MAC Timer MUX overflow 0.
Definition: rfcore-sfr.h:54
#define RFCORE_XREG_FRMCTRL0_AUTOACK
Transmit ACK frame enable.
Definition: rfcore-xreg.h:211
Header file for the cc2538 System Control driver.
#define RFCORE_XREG_FSMSTAT0
Radio status register.
Definition: rfcore-xreg.h:62
void udma_set_channel_dst(uint8_t channel, uint32_t dst_end)
Sets the channel&#39;s destination address.
Definition: udma.c:80
void packetbuf_clear(void)
Clear and reset the packetbuf.
Definition: packetbuf.c:75
#define RFCORE_SFR_MTM1
MAC Timer MUX register 1.
Definition: rfcore-sfr.h:51
#define SYS_CTRL_SCGCRFC
RF Core clocks - Sleep mode.
Definition: sys-ctrl.h:94
#define RFCORE_XREG_FSMSTAT1
Radio status register.
Definition: rfcore-xreg.h:63
static uip_ds6_addr_t * addr
Pointer to a nbr cache entry.
Definition: uip-nd6.c:116
#define RFCORE_SFR_MTCTRL_LATCH_MODE
OVF counter latch mode.
Definition: rfcore-sfr.h:77
Header file for the cc2538 RF driver.
Header file for the energy estimation mechanism
#define CC2538_RF_CSP_ISFLUSHTX()
Flush the TX FIFO.
Definition: cc2538-rf.h:120
#define PROCESS_YIELD_UNTIL(c)
Yield the currently running process until a condition occurs.
Definition: process.h:178
Header file for the radio API
#define PROCESS_BEGIN()
Define the beginning of a process.
Definition: process.h:120
#define RFCORE_SFR_MTMOVF0_MTMOVF0
Register[7:0].
Definition: rfcore-sfr.h:124
Header file for the link-layer address representation
#define PROCESS_END()
Define the end of a process.
Definition: process.h:131
int(* receiving_packet)(void)
Check if the radio driver is currently receiving a packet.
Definition: radio.h:268
#define RFCORE_FFSM_SHORT_ADDR1
Local address information.
Definition: rfcore-ffsm.h:65
#define RFCORE_SFR_MTCTRL_RUN
Timer start/stop.
Definition: rfcore-sfr.h:80
radio_result_t(* set_value)(radio_param_t param, radio_value_t value)
Set a radio parameter value.
Definition: radio.h:283
int(* pending_packet)(void)
Check if the radio driver has just received a packet.
Definition: radio.h:271
void clock_delay_usec(uint16_t dt)
Delay a given number of microseconds.
Definition: clock.c:150
The structure of a device driver for a radio in Contiki.
Definition: radio.h:247
static void set_channel(uint8_t channel)
Set the current operating channel.
Definition: cc2538-rf.c:166
#define RFCORE_XREG_FSMSTAT1_SFD
SFD was sent/received.
Definition: rfcore-xreg.h:283
Header file with register manipulation macro definitions.
#define RFCORE_XREG_FRMFILT0_FRAME_FILTER_EN
Enables frame filtering.
Definition: rfcore-xreg.h:149
#define RFCORE_XREG_CCACTRL0_CCA_THR
Clear-channel-assessment.
Definition: rfcore-xreg.h:307
int(* channel_clear)(void)
Perform a Clear-Channel Assessment (CCA) to find out if there is a packet in the air or not...
Definition: radio.h:265
int radio_value_t
Each radio has a set of parameters that designate the current configuration and state of the radio...
Definition: radio.h:88
#define CC2538_RF_CONF_RX_DMA_CHAN
RAM -> RF DMA channel.
Definition: cc2538-conf.h:96
#define RFCORE_SFR_MTMSEL
MAC Timer multiplex select.
Definition: rfcore-sfr.h:49
#define RFCORE_SFR_RFDATA
TX/RX FIFO data.
Definition: rfcore-sfr.h:60
const struct radio_driver cc2538_rf_driver
The NETSTACK data structure for the cc2538 RF driver.
Definition: cc2538-rf.c:1008
Header file with register, macro and function declarations for the cc2538 micro-DMA controller module...
#define CC2538_RF_CONF_TX_DMA_CHAN
RF -> RAM DMA channel.
Definition: cc2538-conf.h:95
#define RFCORE_XREG_FSMSTAT1_TX_ACTIVE
Status signal - TX states.
Definition: rfcore-xreg.h:287
void udma_channel_mask_set(uint8_t channel)
Disable peripheral triggers for a uDMA channel.
Definition: udma.c:204
#define RFCORE_XREG_RFERRM_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:393
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
Disable External Interrupt.
Definition: core_cm0.h:653
#define IEEE802154_DEFAULT_CHANNEL
The default channel for IEEE 802.15.4 networks.
Definition: mac.h:52
#define RTIMER_NOW()
Get the current clock time.
Definition: rtimer.h:160
#define RFCORE_XREG_FSMSTAT0_FSM_FFCTRL_STATE
FIFO and FFCTRL status.
Definition: rfcore-xreg.h:275
#define RFCORE_FFSM_EXT_ADDR0
Local address information.
Definition: rfcore-ffsm.h:54
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
Enable External Interrupt.
Definition: core_cm0.h:642
#define CC2538_RF_CSP_ISRXON()
Send an RX ON command strobe to the CSP.
Definition: cc2538-rf.h:95
RF Tx/Rx Interrupt.
Definition: cc2538_cm3.h:109
void udma_set_channel_src(uint8_t channel, uint32_t src_end)
Sets the channels source address.
Definition: udma.c:70
#define RFCORE_XREG_FSCAL1
Tune frequency calibration.
Definition: rfcore-xreg.h:89
#define RFCORE_XREG_TXPOWER
Controls the output power.
Definition: rfcore-xreg.h:60
void(* input)(void)
Callback for getting notified of incoming packet.
Definition: mac.h:72
#define RFCORE_XREG_FSMSTAT1_FIFO
FIFO status.
Definition: rfcore-xreg.h:281
#define CC2538_RF_CSP_ISRFOFF()
Send a RF OFF command strobe to the CSP.
Definition: cc2538-rf.h:107
#define RFCORE_XREG_RFIRQM0
RF interrupt masks.
Definition: rfcore-xreg.h:79
int(* send)(const void *payload, unsigned short payload_len)
Prepare & transmit a packet.
Definition: radio.h:258
int(* transmit)(unsigned short transmit_len)
Send the packet that has previously been prepared.
Definition: radio.h:255
#define RFCORE_XREG_RSSISTAT
RSSI valid status register.
Definition: rfcore-xreg.h:69
void process_poll(struct process *p)
Request a process to be polled.
Definition: process.c:371
int(* off)(void)
Turn the radio off.
Definition: radio.h:277
#define RFCORE_FFSM_PAN_ID0
Local address information.
Definition: rfcore-ffsm.h:62
#define RFCORE_XREG_FRMCTRL0
Frame handling.
Definition: rfcore-xreg.h:53
#define RFCORE_XREG_FSMSTAT1_FIFOP
FIFOP status.
Definition: rfcore-xreg.h:282
#define RFCORE_XREG_RFIRQM0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-xreg.h:373
void cc2538_rf_err_isr(void)
The cc2538 RF Error ISR.
Definition: cc2538-rf.c:1113
#define RFCORE_XREG_FREQCTRL
Controls the RF frequency.
Definition: rfcore-xreg.h:59
void udma_channel_enable(uint8_t channel)
Enables a uDMA channel.
Definition: udma.c:120
Header file for the real-time timer module.
#define RFCORE_SFR_MTM0
MAC Timer MUX register 0.
Definition: rfcore-sfr.h:50
#define RFCORE_XREG_FRMCTRL0_RX_MODE
Set RX modes.
Definition: rfcore-xreg.h:213
#define PACKETBUF_SIZE
The size of the packetbuf, in bytes.
Definition: packetbuf.h:66
#define RFCORE_XREG_FSMSTAT1_CCA
Clear channel assessment.
Definition: rfcore-xreg.h:284
#define RFCORE_XREG_TXFILTCFG
TX filter configuration.
Definition: rfcore-xreg.h:141
Main API declarations for TSCH.
#define RFCORE_FFSM_PAN_ID1
Local address information.
Definition: rfcore-ffsm.h:63
#define RADIO_RX_MODE_ADDRESS_FILTER
The radio reception mode controls address filtering and automatic transmission of acknowledgements in...
Definition: radio.h:214
#define RFCORE_SFR_MTMOVF2
MAC Timer MUX overflow 2.
Definition: rfcore-sfr.h:52
void udma_channel_sw_request(uint8_t channel)
Generate a software trigger to start a transfer.
Definition: udma.c:225
#define RFCORE_XREG_FIFOPCTRL
FIFOP threshold.
Definition: rfcore-xreg.h:64
#define RADIO_TX_MODE_SEND_ON_CCA
The radio transmission mode controls whether transmissions should be done using clear channel assessm...
Definition: radio.h:226
#define RFCORE_SFR_RFIRQF0_FIFOP
RX FIFO exceeded threshold.
Definition: rfcore-sfr.h:164
void cc2538_rf_rx_tx_isr(void)
The cc2538 RF RX/TX ISR.
Definition: cc2538-rf.c:1086
#define RFCORE_SFR_MTMOVF1_MTMOVF1
Register[15:8].
Definition: rfcore-sfr.h:123
RF Error Interrupt.
Definition: cc2538_cm3.h:110
#define RFCORE_XREG_RFERRM
RF error interrupt mask.
Definition: rfcore-xreg.h:81
static radio_value_t get_rssi(void)
Reads the current signal strength (RSSI)
Definition: cc2538-rf.c:224
#define RFCORE_SFR_MTCTRL_STATE
State of MAC Timer.
Definition: rfcore-sfr.h:78
#define CC2538_RF_CSP_ISTXON()
Send a TX ON command strobe to the CSP.
Definition: cc2538-rf.h:101
#define RFCORE_SFR_MTMOVF2_MTMOVF2
Register[23:16].
Definition: rfcore-sfr.h:117
const uint16_t tsch_timeslot_timing_us_10000[tsch_ts_elements_count]
The default timeslot timing in the standard is a guard time of 2200 us, a Tx offset of 2120 us and a ...
#define RFCORE_SFR_MTCTRL
MAC Timer control register.
Definition: rfcore-sfr.h:46
int(* read)(void *buf, unsigned short buf_len)
Read a received packet into a buffer.
Definition: radio.h:261
#define RFCORE_XREG_CCACTRL0
CCA threshold.
Definition: rfcore-xreg.h:66
#define CC2538_RF_CSP_ISFLUSHRX()
Flush the RX FIFO.
Definition: cc2538-rf.h:113
#define RFCORE_XREG_RSSI
RSSI status register.
Definition: rfcore-xreg.h:68
#define RFCORE_SFR_MTMOVF1
MAC Timer MUX overflow 1.
Definition: rfcore-sfr.h:53
Header file for the Packet buffer (packetbuf) management
Include file for the Contiki low-layer network stack (NETSTACK)
radio_result_t(* get_value)(radio_param_t param, radio_value_t *value)
Get a radio parameter value.
Definition: radio.h:280
#define RFCORE_XREG_FRMCTRL0_AUTOCRC
Auto CRC generation / checking.
Definition: rfcore-xreg.h:210
#define RFCORE_XREG_AGCCTRL1
AGC reference level.
Definition: rfcore-xreg.h:93
void udma_set_channel_control_word(uint8_t channel, uint32_t ctrl)
Configure the channel&#39;s control word.
Definition: udma.c:90
#define RFCORE_XREG_RSSISTAT_RSSI_VALID
RSSI value is valid.
Definition: rfcore-xreg.h:327
PROCESS_THREAD(cc2538_rf_process, ev, data)
Implementation of the cc2538 RF driver process.
Definition: cc2538-rf.c:1035
#define udma_xfer_size(len)
Calculate the value of the xfersize field in the control structure.
Definition: udma.h:697
#define RFCORE_XREG_RXENABLE_RXENMASK
Enables the receiver.
Definition: rfcore-xreg.h:228
#define CC2538_RF_CONF_RX_USE_DMA
RF RX over DMA.
Definition: cc2538-conf.h:232
static int init(void)
Definition: cc2538-rf.c:470
uint8_t udma_channel_get_mode(uint8_t channel)
Retrieve the current mode for a channel.
Definition: udma.c:235
#define RFCORE_SFR_RFERRF
RF error interrupt flags.
Definition: rfcore-sfr.h:61
Header file for the logging system
#define RFCORE_SFR_MTMSEL_MTMOVFSEL
MTMOVF register select.
Definition: rfcore-sfr.h:108
radio_result_t(* set_object)(radio_param_t param, const void *src, size_t size)
Set a radio parameter object.
Definition: radio.h:296
#define RFCORE_SFR_RFERRF_RXOVERF
RX FIFO overflowed.
Definition: rfcore-sfr.h:140
#define RFCORE_SFR_MTMSEL_MTMSEL
MTM register select.
Definition: rfcore-sfr.h:109
#define SYS_CTRL_DCGCRFC
RF Core clocks - PM0.
Definition: sys-ctrl.h:95
#define RFCORE_XREG_RXENABLE
RX enabling.
Definition: rfcore-xreg.h:55
void packetbuf_set_datalen(uint16_t len)
Set the length of the data in the packetbuf.
Definition: packetbuf.c:136
int(* on)(void)
Turn the radio on.
Definition: radio.h:274
#define CC2538_RF_CONF_TX_USE_DMA
RF TX over DMA.
Definition: cc2538-conf.h:228
#define RFCORE_SFR_MTM0_MTM0
Register[7:0].
Definition: rfcore-sfr.h:115
#define RFCORE_SFR_RFIRQF0
RF interrupt flags.
Definition: rfcore-sfr.h:63
void process_start(struct process *p, process_data_t data)
Start a process.
Definition: process.c:99
static uint8_t get_channel()
Get the current operating channel.
Definition: cc2538-rf.c:156
#define RFCORE_XREG_FRMFILT0
Frame filtering control.
Definition: rfcore-xreg.h:44