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gpio-hal-arch.h
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1/*
2 * Copyright (c) 2026, RISE Research Institutes of Sweden AB
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * 3. Neither the name of the copyright holder nor the names of its
17 * contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
31 * OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/**
35 * \file
36 * GPIO HAL definitions for MSP-EXP430FR5969 LaunchPad
37 *
38 * Ports are numbered 1..4 to mirror the MSP430 hardware naming
39 * (P1, P2, P3, P4). PJ is not exposed as it is reserved for JTAG
40 * and the LFXT crystal.
41 */
42
43#ifndef GPIO_HAL_ARCH_H_
44#define GPIO_HAL_ARCH_H_
45
46#include "contiki.h"
47#include <msp430.h>
48
49/*---------------------------------------------------------------------------*/
50#define GPIO_HAL_ARCH_PORT_1 1
51#define GPIO_HAL_ARCH_PORT_2 2
52#define GPIO_HAL_ARCH_PORT_3 3
53#define GPIO_HAL_ARCH_PORT_4 4
54
55/*---------------------------------------------------------------------------*/
56/* Inline implementations for the operations called from timing-critical
57 * paths (e.g. the DHT11 bit-banging driver). The switch lets the compiler
58 * fold to a single bis/bic/xor when the port is a compile-time constant. */
59/*---------------------------------------------------------------------------*/
60#define gpio_hal_arch_set_pin(port, pin) \
61 gpio_hal_arch_msp430_set_pin(port, pin)
62#define gpio_hal_arch_clear_pin(port, pin) \
63 gpio_hal_arch_msp430_clear_pin(port, pin)
64#define gpio_hal_arch_toggle_pin(port, pin) \
65 gpio_hal_arch_msp430_toggle_pin(port, pin)
66#define gpio_hal_arch_read_pin(port, pin) \
67 gpio_hal_arch_msp430_read_pin(port, pin)
68#define gpio_hal_arch_write_pin(port, pin, v) \
69 gpio_hal_arch_msp430_write_pin(port, pin, v)
70
71#define gpio_hal_arch_set_pins(port, pins) \
72 gpio_hal_arch_msp430_set_pins(port, pins)
73#define gpio_hal_arch_clear_pins(port, pins) \
74 gpio_hal_arch_msp430_clear_pins(port, pins)
75#define gpio_hal_arch_toggle_pins(port, pins) \
76 gpio_hal_arch_msp430_toggle_pins(port, pins)
77#define gpio_hal_arch_read_pins(port, pins) \
78 gpio_hal_arch_msp430_read_pins(port, pins)
79#define gpio_hal_arch_write_pins(port, pins, v) \
80 gpio_hal_arch_msp430_write_pins(port, pins, v)
81
82#define gpio_hal_arch_pin_set_input(port, pin) \
83 gpio_hal_arch_msp430_pin_set_input(port, pin)
84#define gpio_hal_arch_pin_set_output(port, pin) \
85 gpio_hal_arch_msp430_pin_set_output(port, pin)
86/*---------------------------------------------------------------------------*/
87static inline void
88gpio_hal_arch_msp430_set_pins(gpio_hal_port_t port, gpio_hal_pin_mask_t pins)
89{
90 uint8_t m = (uint8_t)pins;
91 switch(port) {
92 case 1: P1OUT |= m; break;
93 case 2: P2OUT |= m; break;
94 case 3: P3OUT |= m; break;
95 case 4: P4OUT |= m; break;
96 }
97}
98/*---------------------------------------------------------------------------*/
99static inline void
100gpio_hal_arch_msp430_clear_pins(gpio_hal_port_t port, gpio_hal_pin_mask_t pins)
101{
102 uint8_t m = (uint8_t)pins;
103 switch(port) {
104 case 1: P1OUT &= ~m; break;
105 case 2: P2OUT &= ~m; break;
106 case 3: P3OUT &= ~m; break;
107 case 4: P4OUT &= ~m; break;
108 }
109}
110/*---------------------------------------------------------------------------*/
111static inline void
112gpio_hal_arch_msp430_toggle_pins(gpio_hal_port_t port, gpio_hal_pin_mask_t pins)
113{
114 uint8_t m = (uint8_t)pins;
115 switch(port) {
116 case 1: P1OUT ^= m; break;
117 case 2: P2OUT ^= m; break;
118 case 3: P3OUT ^= m; break;
119 case 4: P4OUT ^= m; break;
120 }
121}
122/*---------------------------------------------------------------------------*/
123static inline gpio_hal_pin_mask_t
124gpio_hal_arch_msp430_read_pins(gpio_hal_port_t port, gpio_hal_pin_mask_t pins)
125{
126 uint8_t m = (uint8_t)pins;
127 uint8_t in = 0;
128 switch(port) {
129 case 1: in = P1IN; break;
130 case 2: in = P2IN; break;
131 case 3: in = P3IN; break;
132 case 4: in = P4IN; break;
133 }
134 return (gpio_hal_pin_mask_t)(in & m);
135}
136/*---------------------------------------------------------------------------*/
137static inline void
138gpio_hal_arch_msp430_write_pins(gpio_hal_port_t port,
141{
142 uint8_t m = (uint8_t)pins;
143 uint8_t v = (uint8_t)value;
144 switch(port) {
145 case 1: P1OUT = (P1OUT & ~m) | (v & m); break;
146 case 2: P2OUT = (P2OUT & ~m) | (v & m); break;
147 case 3: P3OUT = (P3OUT & ~m) | (v & m); break;
148 case 4: P4OUT = (P4OUT & ~m) | (v & m); break;
149 }
150}
151/*---------------------------------------------------------------------------*/
152static inline void
153gpio_hal_arch_msp430_set_pin(gpio_hal_port_t port, gpio_hal_pin_t pin)
154{
155 gpio_hal_arch_msp430_set_pins(port, (gpio_hal_pin_mask_t)1 << pin);
156}
157/*---------------------------------------------------------------------------*/
158static inline void
159gpio_hal_arch_msp430_clear_pin(gpio_hal_port_t port, gpio_hal_pin_t pin)
160{
161 gpio_hal_arch_msp430_clear_pins(port, (gpio_hal_pin_mask_t)1 << pin);
162}
163/*---------------------------------------------------------------------------*/
164static inline void
165gpio_hal_arch_msp430_toggle_pin(gpio_hal_port_t port, gpio_hal_pin_t pin)
166{
167 gpio_hal_arch_msp430_toggle_pins(port, (gpio_hal_pin_mask_t)1 << pin);
168}
169/*---------------------------------------------------------------------------*/
170static inline uint8_t
171gpio_hal_arch_msp430_read_pin(gpio_hal_port_t port, gpio_hal_pin_t pin)
172{
173 return gpio_hal_arch_msp430_read_pins(port, (gpio_hal_pin_mask_t)1 << pin)
174 ? 1 : 0;
175}
176/*---------------------------------------------------------------------------*/
177static inline void
178gpio_hal_arch_msp430_write_pin(gpio_hal_port_t port,
179 gpio_hal_pin_t pin,
180 uint8_t value)
181{
183 gpio_hal_arch_msp430_write_pins(port, mask, value ? mask : 0);
184}
185/*---------------------------------------------------------------------------*/
186/* SEL0/SEL1 = 0/0 selects the GPIO function on every FR5969 pin. The
187 * helpers below also clear those bits so a pin that was previously routed
188 * to a peripheral (e.g. UART) becomes a plain GPIO. */
189/*---------------------------------------------------------------------------*/
190static inline void
191gpio_hal_arch_msp430_pin_set_input(gpio_hal_port_t port, gpio_hal_pin_t pin)
192{
193 uint8_t m = (uint8_t)1 << pin;
194 uint8_t nm = (uint8_t)~m;
195 switch(port) {
196 case 1: P1SEL0 &= nm; P1SEL1 &= nm; P1DIR &= nm; break;
197 case 2: P2SEL0 &= nm; P2SEL1 &= nm; P2DIR &= nm; break;
198 case 3: P3SEL0 &= nm; P3SEL1 &= nm; P3DIR &= nm; break;
199 case 4: P4SEL0 &= nm; P4SEL1 &= nm; P4DIR &= nm; break;
200 }
201}
202/*---------------------------------------------------------------------------*/
203static inline void
204gpio_hal_arch_msp430_pin_set_output(gpio_hal_port_t port, gpio_hal_pin_t pin)
205{
206 uint8_t m = (uint8_t)1 << pin;
207 uint8_t nm = (uint8_t)~m;
208 switch(port) {
209 case 1: P1SEL0 &= nm; P1SEL1 &= nm; P1DIR |= m; break;
210 case 2: P2SEL0 &= nm; P2SEL1 &= nm; P2DIR |= m; break;
211 case 3: P3SEL0 &= nm; P3SEL1 &= nm; P3DIR |= m; break;
212 case 4: P4SEL0 &= nm; P4SEL1 &= nm; P4DIR |= m; break;
213 }
214}
215/*---------------------------------------------------------------------------*/
216#endif /* GPIO_HAL_ARCH_H_ */
static int value(int type)
uint32_t gpio_hal_pin_mask_t
GPIO pin mask representation.
Definition gpio-hal.h:142
uint8_t gpio_hal_port_t
A data structure that represents ports.
Definition gpio-hal.h:110
uint8_t gpio_hal_pin_t
GPIO pin number representation.
Definition gpio-hal.h:103