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file | smwdthrosc.h |
| Header file with register declarations and bit masks for the cc2538 Sleep Timer and Watchdog.
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#define | SMWDTHROSC_WDCTL 0x400D5000 |
| Watchdog Control.
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#define | SMWDTHROSC_ST0 0x400D5040 |
| ST count/compare value 0.
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#define | SMWDTHROSC_ST1 0x400D5044 |
| ST count/compare value 1.
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#define | SMWDTHROSC_ST2 0x400D5048 |
| ST count/compare value 2.
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#define | SMWDTHROSC_ST3 0x400D504C |
| ST count/compare value 3.
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#define | SMWDTHROSC_STLOAD 0x400D5050 |
| Compare value load status.
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#define | SMWDTHROSC_STCC 0x400D5054 |
| ST capture control.
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#define | SMWDTHROSC_STCS 0x400D5058 |
| ST capture status.
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#define | SMWDTHROSC_STCV0 0x400D505C |
| ST capture value 0.
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#define | SMWDTHROSC_STCV1 0x400D5060 |
| ST capture value 1.
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#define | SMWDTHROSC_STCV2 0x400D5064 |
| ST capture value 2.
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#define | SMWDTHROSC_STCV3 0x400D5068 |
| ST capture value 3.
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#define | SMWDTHROSC_WDCTL_CLR 0x000000F0 |
| Clear timer mask.
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#define | SMWDTHROSC_WDCTL_CLR_3 0x00000080 |
| Clear timer mask[3].
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#define | SMWDTHROSC_WDCTL_CLR_2 0x00000040 |
| Clear timer mask[2].
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#define | SMWDTHROSC_WDCTL_CLR_1 0x00000020 |
| Clear timer mask[1].
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#define | SMWDTHROSC_WDCTL_CLR_0 0x00000010 |
| Clear timer mask[0].
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#define | SMWDTHROSC_WDCTL_EN 0x00000008 |
| Enable mask.
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#define | SMWDTHROSC_WDCTL_MODE 0x00000004 |
| Mode select mask.
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#define | SMWDTHROSC_WDCTL_INT 0x00000003 |
| Interval Select mask.
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#define | SMWDTHROSC_ST0_ST0 0x000000FF |
| ST count/compare bits [7:0].
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#define | SMWDTHROSC_ST1_ST1 0x000000FF |
| ST count/compare bits [15:8].
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#define | SMWDTHROSC_ST2_ST2 0x000000FF |
| ST count/compare bits [23:16].
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#define | SMWDTHROSC_ST3_ST3 0x000000FF |
| ST count/compare bits [31:24].
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#define | SMWDTHROSC_STLOAD_STLOAD 0x00000001 |
| STx upload status signal.
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#define | SMWDTHROSC_STCC_PORT 0x00000038 |
| Port select.
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#define | SMWDTHROSC_STCC_PIN 0x00000007 |
| Pin select.
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#define | SMWDTHROSC_STCS_VALID 0x00000001 |
| Capture valid flag.
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#define | SMWDTHROSC_STCV0_STCV0 0x000000FF |
| ST capture bits [7:0].
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#define | SMWDTHROSC_STCV1_STCV1 0x000000FF |
| ST capture bits [15:8].
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#define | SMWDTHROSC_STCV2_STCV2 0x000000FF |
| ST capture bits [23:16].
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#define | SMWDTHROSC_STCV3_STCV3 0x000000FF |
| ST capture bits [32:24].
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Register declarations for the cc2538 Sleep Timer and Watchdog